Commit Graph

8701 Commits

Author SHA1 Message Date
6cf06fba7b examples: use default IP addresses for boards 2019-10-16 16:18:30 +08:00
Tim Ballance
c64c8b4ddc manual: RTIO sequence error notes (#1311) 2019-10-12 10:04:37 +08:00
David Nadlinger
371388ecbe doc: Re-fix ARTIQ type hint formatting (#714)
This adapts the previous monkey patch for the changed location of the
attribute rendering code in Sphinx 2.0.
2019-10-11 17:44:38 +01:00
9c5ff4fc04 manual: Nix bug 2709 fixed in Nix 2.3 2019-10-10 11:29:48 +08:00
3aade3b59a manual: now building for nixpkgs 19.09 2019-10-10 10:55:44 +08:00
314d9b5d06 kasli: default to 125MHz frequency for DRTIO
This is the consistent and most common option. Sayma will also eventually move to it.
2019-10-08 12:59:52 +08:00
4df2c5d1fb sayma: prepare for SYSREF align
We will try DDMTD on the AMC first, as this is simpler and perhaps will work on v2 after the power supply fixes.
2019-10-08 12:30:47 +08:00
5ee81dc643 satman: define constants for JdacBasicRequest reqnos 2019-10-08 10:27:04 +08:00
4b3baf4825 firmware: run PRBS and STPL JESD204 tests 2019-10-08 00:10:36 +08:00
03007b896e sayma_amc: sma -> mcx 2019-10-07 20:31:35 +08:00
ebd5d890f1 satman: check for JESD ready 2019-10-06 23:10:57 +08:00
90e3b83e80 hmc7043: turn on AMC_FPGA_SYSREF1
Florent's JESD core won't work at all without.
2019-10-06 22:49:00 +08:00
97a0dee3e8 jesd204: remove ibuf_disable
We use the MOSFET to mute the HMC7043 noise on hardware v2 instead.
2019-10-06 22:26:31 +08:00
1bc7743e03 sayma: fix hmc7043 output settings for v2 hardware 2019-10-06 21:50:29 +08:00
a421820a32 sayma: initialize DACs over DRTIO 2019-10-06 21:42:45 +08:00
f8e4cc37d0 sayma_rtm: reset and detect DACs 2019-10-06 20:15:27 +08:00
f62dc7e1d4 sayma: refactor JESD DAC channel groups 2019-10-06 20:15:09 +08:00
c4c884b8ce ad9154: simplify, focus on AD9154 config and do not include JESD 2019-10-06 20:07:02 +08:00
fdba0bfbbc satman: move now-unrelated hmc830_7043 init away from DRTIO transceiver init 2019-10-06 19:22:46 +08:00
1c6c22fde9 sayma_amc: HMC830_REF moved to RTM side 2019-10-06 18:15:37 +08:00
ad63908aff hmc830_7043: enable_fpga_ibuf -> unmute 2019-10-06 18:13:59 +08:00
5ad65b9d30 hmc830_7043: remove clock_mux 2019-10-06 18:13:27 +08:00
e6ff44301b sayma_amc: cleanup (v2.0 only) 2019-10-06 18:11:43 +08:00
e9b81f6e33 remove serwb
DRTIO is a better solution
2019-10-06 18:10:23 +08:00
7cd02d30b7 sayma_rtm_drtio: replace sayma_rtm 2019-10-06 17:59:53 +08:00
b3b85135a3 sayma_rtm_drtio: add DDMTD core, move specific cores out of SatelliteBase 2019-10-06 17:59:11 +08:00
346c985347 sayma_rtm_drtio: use artiq_sayma folder 2019-10-06 17:30:08 +08:00
e2a924449d artiq_flash: use DRTIO RTM gateware 2019-10-06 17:28:14 +08:00
4198033657 sayma_rtm_drtio: cleanup (v2.0 only) 2019-10-06 16:42:34 +08:00
5612b31860 sayma_rtm_drtio: add HMC clock chip and DAC control 2019-10-06 16:15:24 +08:00
a8cf4c2b18 sayma_rtm: hwrev v2.0 by default 2019-10-06 13:25:30 +08:00
1bc5d44a7c artiq_flash: do not flash RTM gateware on Sayma variants that don't need it 2019-10-06 13:15:50 +08:00
bb5ff46f7d Merge branch 'wrpll' 2019-10-05 10:24:11 +08:00
7b95814cf5 sayma_amc: refactor, add SimpleSatellite variant 2019-10-05 10:24:06 +08:00
58b7bdcecc sayma_amc: refactor RTM FPGA code 2019-10-05 10:24:06 +08:00
96fc4a21e8 sayma_amc: remove dummy FPGA pin assignment testing code 2019-10-05 10:24:06 +08:00
Tim Ballance
ada3b39f4e Fix ad9910 ram mode asf scale error in polar mode 2019-10-04 20:14:41 +02:00
Tim Ballance
448080e71d Fix ad9910 ram mode asf scale error
RAM mode amplitude to ASF conversion should be << 18 rather than << 16
2019-10-04 20:14:41 +02:00
6aa68e1715 sayma_rtm2: select filtered clock from Si5324 2019-10-04 22:56:16 +08:00
6cb0f5de59 sayma_amc: enable DRTIO switching 2019-10-04 22:55:23 +08:00
0cf8a46bbd sayma_amc2: select filtered clock from Si5324 2019-10-04 21:28:26 +08:00
6f533727cb artiq_flash: use regular bscan_spi_xcku040 for Sayma
The modified version is no longer necessary on v2 boards, and breaks flash bank 1.
2019-10-04 17:50:45 +08:00
4c1fe1de0d environment: implement HasEnvironment.call_child_method (#1366) 2019-09-30 23:58:36 +08:00
Charles Baynham
0b1fb255a9 tools: Wrap Task _do() calls in a generic exception handler
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2019-09-20 23:00:59 +08:00
Charles Baynham
e50a6d5aaf worker_impy: ignore newline at start of experiment docstring 2019-09-20 22:10:49 +08:00
f0e87d2e59 grabber: remove unused code 2019-09-20 15:26:12 +02:00
4e77be0511 firmware: add Cargo.lock header that newer cargo wants 2019-09-17 15:22:14 +08:00
694b85f37a doc: only one hydra build for conda packages 2019-09-13 09:43:12 +08:00
Charles Baynham
b7abf2fb53 pyon: Handle inf in decoding 2019-09-12 09:46:05 +08:00
38fca01189 artiq_ddb_template: add su-servo support (#1343) 2019-09-11 15:52:25 +08:00