Robert Jördens
70fd369e2f
conda: bump migen (sayma lvds diff term)
2018-06-15 17:28:49 +02:00
Robert Jördens
edfae3c4ba
hmc7043: make fpga fabric clocks lvds
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2 V common and 1.9 Vpp swing
is brutal to the banks (HP 1.8V AMC and RT 1.8V RTM)
2018-06-15 14:24:33 +00:00
Robert Jördens
f385add8b1
slave_fpga: disable cclk and din drive when done
...
to guard against accidental contention (old rtm gateware
but #813 rework done)
2018-06-13 16:26:48 +00:00
Robert Jördens
1029ac870b
sayma_rtm: don't drive txen pins
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pins disabled by config
necessary for using that pin as DIN (#813 )
2018-06-13 16:11:30 +00:00
Sebastien Bourdeauducq
68d16fc292
serwb: support single-ended signals
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Low-speed PHY only.
2018-06-13 21:28:21 +08:00
Robert Jördens
f8627952c8
conda: fix migen build string
2018-06-12 20:25:28 +02:00
Robert Jördens
a9a25f2605
sayma_rtm: drive ref_lo_clk_sel, and set clk muxes early
2018-06-12 20:00:12 +02:00
Robert Jördens
aff7fa008f
Revert "artiq_flash/sayma: check for DONE after load"
...
This reverts commit 2de5b0cf25
.
would make artiq uninstallable on windows as win buildbot is broken
2018-06-12 19:14:43 +02:00
Robert Jördens
2de5b0cf25
artiq_flash/sayma: check for DONE after load
2018-06-13 00:47:43 +08:00
Thomas Harty
b90a8fcc82
Merge branch 'master' of https://github.com/m-labs/artiq
2018-06-12 14:55:22 +01:00
ion
28ecf81c6c
Sayma: HMC7043 init and detect no longer need results.
2018-06-12 13:10:26 +01:00
ion
c8935f7adf
Sayma: bypass dividers where possible to minimize noise (nb this changes the output skew).
2018-06-12 12:56:04 +01:00
hartytp
7a0140ecb2
Sayma HMC830: update interface and register writes. ( #1068 )
...
* Break the HMC830 init into separate functions for general purpose (but, integer-N) init, setting dividers and checking lock
* Use 1.6mA ICP (which the loop filter was optimized for)
* Go through the data sheet carefully and set all registers to the correct value (e.g. ensure that all settings are correctly optimized for integer-N usage)
* Change divider values (now using 100MHz PFD, which should give lower noise in theory)
2018-06-12 12:37:17 +01:00
Robert Jördens
a9d97101fc
slave_fpga: add another check
2018-06-12 10:24:04 +02:00
Robert Jördens
a143e238a8
savel_fpga: get rid of unneeded config
2018-06-12 10:24:04 +02:00
Robert Jördens
4912f53ab4
slave_fpga: board_misoc
2018-06-12 10:24:04 +02:00
hartytp
cb6e44b23a
Sayma: disable unused HMC7043 outputs.
2018-06-12 16:18:20 +08:00
Robert Jördens
0b086225a9
sawg: don't use Cat() for signed signals
...
c.f. #1039 #1040 #1022 #1058 #1044
2018-06-09 07:33:47 +00:00
Robert Jördens
5b73dd8604
sawg: accurate unittest rtio freq
2018-06-08 17:22:13 +02:00
Robert Jördens
6a7983cf89
conda: bump misoc
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closes #1039
closes #1040
closes #1022
closes #1058
closes #1044
2018-06-08 17:11:01 +02:00
Robert Jördens
735e4e8561
pcu: spelling
2018-06-08 14:39:22 +00:00
Robert Jördens
e5f6750171
sawg: cleanup double assign
2018-06-08 14:31:55 +00:00
Florent Kermarrec
53e9e475d0
serwb: transmit zeroes when nothing to transmit (for prbs), improve rx idle detection
2018-06-08 16:10:31 +02:00
Florent Kermarrec
7296a76f18
serwb: move common datapath code to datapath.py, simplify flow control
2018-06-08 12:37:08 +02:00
Florent Kermarrec
89797d08ed
serwb: revert to 125MHz linerate (until we understand why 1gbps version breaks between builds)
2018-06-07 15:13:56 +02:00
Robert Jördens
b4c2b148d1
sawg: don't use Mux for signed signals
...
migen#75
2018-06-06 15:51:14 +00:00
Sebastien Bourdeauducq
28f31323a3
conda: bump migen (again)
2018-06-06 23:35:26 +08:00
Sebastien Bourdeauducq
f427d45144
conda: bump migen
2018-06-06 22:58:32 +08:00
Florent Kermarrec
009db5eda9
serwb: revert 1gbps linerate
2018-06-06 16:20:20 +02:00
Sebastien Bourdeauducq
cae92f9b44
kasli: add Tsinghua variant
2018-06-06 19:03:45 +08:00
Robert Jördens
38971d130a
comm_analyzer: fix data without any spi reads
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closes #1050
2018-06-06 12:21:42 +02:00
Robert Jördens
e21b7965b9
sayma_amc: change test patterns for 'without-sawg'
2018-06-06 08:02:52 +00:00
Sebastien Bourdeauducq
0d1b36c89b
jesd204: bump
2018-06-06 11:47:54 +08:00
whitequark
38dac16041
compiler: don't crash when quoting builtin functions.
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Fixes #1051 .
2018-06-05 23:27:23 +00:00
Sebastien Bourdeauducq
c28fe47164
conda: fix misoc version
2018-06-05 21:11:57 +08:00
Sebastien Bourdeauducq
af88c4c93e
clean up hmc7043 reset
2018-06-05 20:41:48 +08:00
Thomas Harty
988054f4bb
Sayma: fix mistake in HMC7043 init code.
2018-06-05 19:22:04 +08:00
Thomas Harty
bd1ac7cf3b
Configure HMC7043 to give deterministic phase differences between its outputs
2018-06-05 19:22:04 +08:00
Thomas Harty
ac5c4913ec
Sayma RTM: hold hmc7043 in reset/mute state during init.
2018-06-05 19:22:04 +08:00
Florent Kermarrec
b82158a2de
firmware/ad9154: add stpl test
2018-06-05 02:08:57 +02:00
Chris Ballance
07d4145a35
correct documented siphaser VCO frequency [NFC]
2018-06-04 20:53:43 +08:00
Florent Kermarrec
925b47b077
firmware/ad9154: reset the dac between each configuration attempt
2018-06-04 14:03:26 +02:00
Robert Jördens
bb87976d4f
suservo: docstring fixes, revert parametrization of r_rtt
2018-06-04 07:27:17 +00:00
Robert Jördens
07a1425e51
SUservo EEM docs
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add documentation to eem.SUServo. Change parameterization of t_rtt to include delays on Sampler, as this seems simpler and more robust to changing RTIO frequencies in the future.
c.f. #1046
2018-06-04 08:51:28 +02:00
whitequark
d686d33093
runtime: print hex dumps around PC/EA in case of exception.
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For #1026 .
2018-06-01 21:17:59 +00:00
whitequark
985fd7377b
artiq_rpctool: use inspect.formatargspec instead of a NIH formatter.
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Fixes #1029 .
2018-06-01 19:18:14 +00:00
whitequark
f1a80f12f8
doc: note that coreanalyzer lacks SAWG support.
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Closes #1035 .
2018-06-01 18:47:37 +00:00
Robert Jördens
62deffa7d2
opticlock: fix core device name
2018-06-01 15:39:23 +00:00
Robert Jördens
f50aef1a22
suservo: extract boilerplate
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closes #1041
2018-06-01 15:37:07 +00:00
Robert Jördens
5de2d06568
ad53xx/zotino: do not clear power down on overtemp
2018-06-01 13:17:13 +00:00