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savel_fpga: get rid of unneeded config

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This commit is contained in:
Robert Jördens 2018-06-09 20:22:21 +08:00 committed by Robert Jördens
parent 4912f53ab4
commit a143e238a8
3 changed files with 3 additions and 4 deletions
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2
artiq/firmware/libboard_artiq/lib.rs
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@ -28,7 +28,7 @@ pub mod rpc_queue;
#[cfg(has_si5324)]
pub mod si5324;
#[cfg(has_slave_fpga)]
#[cfg(has_slave_fpga_cfg)]
pub mod slave_fpga;
#[cfg(has_serwb_phy_amc)]
pub mod serwb;

2
artiq/firmware/runtime/main.rs
View File

@ -82,7 +82,7 @@ fn startup() {
_ => info!("UART log level set to INFO by default")
}
#[cfg(has_slave_fpga)]
#[cfg(has_slave_fpga_cfg)]
board_artiq::slave_fpga::load().expect("cannot load RTM FPGA gateware");
#[cfg(has_serwb_phy_amc)]
board_artiq::serwb::wait_init();

3
artiq/gateware/targets/sayma_amc.py
View File

@ -194,8 +194,7 @@ class Standalone(MiniSoC, AMPSoC):
slave_fpga_cfg.init_b,
slave_fpga_cfg.program_b,
])
self.csr_devices.append("slave_fpga_cfg")
# self.config["HAS_SLAVE_FPGA"] = None
# self.csr_devices.append("slave_fpga_cfg")
self.config["SLAVE_FPGA_GATEWARE"] = 0x200000
# AMC/RTM serwb