956098c213
kasli: add second urukul, make clk_sel drive optional
2018-03-06 14:26:27 +01:00
07de7af86a
kasli: make second eem optional in urukul
2018-03-06 14:26:26 +01:00
257bef0d21
slave_fpga: print more info
2018-03-06 14:26:26 +01:00
c25560baec
sed: more LaneDistributor comments
2018-03-06 20:56:35 +08:00
f40255c968
sed: add comments about key points in LaneDistributor
2018-03-06 20:51:09 +08:00
Florent Kermarrec
5b3d6d57e2
drtio/gth: power down rx on restart (seems to make link initialization reliable)
2018-03-06 11:49:28 +01:00
Florent Kermarrec
64b05f07bb
drtio/gth: use parameters from Xilinx transceiver wizard
2018-03-06 11:02:15 +01:00
Florent Kermarrec
45f1e5a70e
drtio/gth: cleanup import
2018-03-06 10:56:07 +01:00
a274af77d5
runtime: fix compilation without DRTIO
2018-03-05 00:43:42 +08:00
432e61bbb4
drtio: add kernel API to check for link status. Closes #941
2018-03-05 00:23:55 +08:00
6aaa8bf9d9
drtio: fix link error generation
2018-03-04 23:20:13 +08:00
d747d74cb3
test: fix test_dma
2018-03-04 23:19:06 +08:00
928d5dc9b3
drtio: raise RTIOLinkError if operation fails due to link lost ( #942 )
2018-03-04 01:02:53 +08:00
ba74013e3e
runtime: add a missing overflow flag reset
2018-03-03 13:16:21 +08:00
abfbadebb5
doc: DMA can also raise RTIOUnderflow
2018-03-03 13:14:34 +08:00
ddcc68cff9
sayma_amc: move bitstream options to migen
...
close #930
2018-03-02 18:13:03 +08:00
5e074f83ac
examples: update kasli sysu
2018-03-02 16:05:12 +08:00
29d42f4648
artiq_flash: add kasli sysu
2018-03-02 15:49:41 +08:00
a9daaad77b
kasli: add SYSU variant and device_db
2018-03-02 14:44:31 +08:00
1c57d27ae2
slave_fpga: use sayma_rtm magic
2018-03-01 18:32:19 +01:00
de63e657b8
kasli/si5324: lock to 100 MHz with highest available bandwidth
2018-03-01 14:49:53 +01:00
abd160d143
slave_fpga: check DONE before loading
2018-03-01 19:53:34 +08:00
a04a36ee36
firmware: move wait for write completion to read()
2018-03-01 11:37:33 +01:00
a6ae08d8b8
firmware/spi: work around cs_polarity semantics
...
The semantics differ between the RTIO and CSR interface.
2018-03-01 11:19:18 +01:00
cc70578f1f
remove old spi RTIO Phy
2018-03-01 11:19:18 +01:00
1329e1a23e
RELEASE_NOTES: add note about spi2 port
2018-03-01 11:19:18 +01:00
ec5b81da55
kc705: switch backplane spi to spi2
2018-03-01 11:19:18 +01:00
6fbe0d8ed8
hmc830: be explicit about SPI mode selection
2018-03-01 11:19:18 +01:00
a7720d05cd
firmware, sayma: port converter_spi to spi2
...
* ksupport/nrt_bus
* port ad9154, hmc830, hmc7043
* port local_spi and drtio_spi
* port kernel_proto libdrtioaux, satman
* change sayma_rtm gateware over
* add spi2 NRTSPIMaster
* remove spi NRTSPIMaster
* change sayma device_db
* change HMC830 to open mode and explicitly sequence open mode
2018-03-01 11:19:18 +01:00
68278e225d
slave_fpga: check for INIT low
2018-03-01 17:28:01 +08:00
whitequark
14f6fa6699
firmware: fix a warning.
2018-03-01 01:25:55 +00:00
whitequark
d051cec0dd
firmware: remove useless module.
2018-03-01 01:22:52 +00:00
54984f080b
artiq_flash: flash RTM firmware
...
based on whitequark's work in f95fb27m-labs/artiq#813
2018-02-28 19:29:01 +01:00
0c49201be7
firmware: add slave fpga serial load support
...
based on whitequark's work in f95fb27m-labs/artiq#813
2018-02-28 19:27:52 +01:00
1f999c7f5f
sayma_amc: expose RTM fpga load pins as GPIOs
2018-02-28 18:44:36 +01:00
cedecc3030
Revert "firmware: Sayma RTM FPGA bitstream loading prototype ( #813 )."
...
This reverts commit f95fb273f1
2018-02-28 18:43:56 +01:00
whitequark
f95fb273f1
firmware: Sayma RTM FPGA bitstream loading prototype ( #813 ).
2018-02-28 16:46:23 +00:00
Florent Kermarrec
2896dc619b
drtio/transceiver/gth: fix multilane
2018-02-28 14:15:40 +01:00
5046d6a529
ad9912/10: add a bit more slack to init()
2018-02-27 23:14:44 +01:00
f97163cdee
examples/master: sync device_db with kc705_nist_clock
2018-02-27 19:40:00 +01:00
whitequark
916b10ca94
examples: spi → spi2.
2018-02-27 18:36:45 +00:00
whitequark
b81855cce7
conda: don't use globs in file list.
2018-02-27 16:07:01 +00:00
386aa75aaa
kasli: control SFP1 and SFP2 LEDs in DRTIO satellite to match master
2018-02-27 23:18:18 +08:00
5d81877b34
kasli: implement multi-link DRTIO on SFP1 and SFP2 of master
2018-02-27 23:15:20 +08:00
whitequark
2f9d01295c
conda: fix YAML syntax.
2018-02-27 14:03:50 +00:00
whitequark
771ba66055
conda: include all files in output package.
2018-02-27 13:40:02 +00:00
Florent Kermarrec
1f0d955ce4
drtio/transceiver/gtp: implement tx multi lane phase alignment sequence
2018-02-27 12:32:25 +01:00
e565d3fa59
kasli: add analyzer and RTIO log to DRTIO master target
2018-02-27 18:09:07 +08:00
1de2da5644
conda: bump migen/misoc
2018-02-26 14:16:05 +01:00
a35e4fe055
conda: bump jesd204b-0.5
2018-02-26 12:48:48 +01:00
