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doc: DMA can also raise RTIOUnderflow

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This commit is contained in:
Sebastien Bourdeauducq 2018-03-03 13:14:34 +08:00
parent ddcc68cff9
commit abfbadebb5
1 changed files with 2 additions and 2 deletions
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4
artiq/coredevice/exceptions.py
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@ -71,8 +71,8 @@ class CacheError(Exception):
class RTIOUnderflow(Exception):
"""Raised when the CPU fails to submit a RTIO event early enough
(with respect to the event's timestamp).
"""Raised when the CPU or DMA core fails to submit a RTIO event early
enough (with respect to the event's timestamp).
The offending event is discarded and the RTIO core keeps operating.
"""