b57b666473
Updating input capture for timers
2021-02-03 13:03:17 +01:00
Ryan Summers
70f6d4e1c4
Merge pull request #256 from vertigo-designs/feature/cargo-embed-support
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Adding support for cargo-embed
2021-02-02 18:21:24 +01:00
Ryan Summers
bf97b5972d
Update .gitignore
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Co-authored-by: Robert Jördens <rj@quartiq.de>
2021-02-02 18:03:46 +01:00
fd54fe384e
Adding Embed.toml file
2021-02-02 17:34:49 +01:00
e767072089
Adding support for cargo-embed
2021-02-02 17:33:58 +01:00
14abaad7de
Merge pull request #255 from quartiq/rj/timestamp-tweaks
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Rj/timestamp tweaks
2021-02-02 16:11:33 +01:00
e423eff0e2
lockin-external: add doc
2021-02-02 15:50:31 +01:00
bd71136cdf
hw/config: add TODO on synchronization
2021-02-02 15:46:50 +01:00
145b48074e
timers: remove spurious tim2 reset
2021-02-02 15:42:51 +01:00
dcc71d5d11
iir: tweak math a bit
2021-02-02 15:41:47 +01:00
ddbfa9d988
timestamping: docs and naming
2021-02-02 14:34:48 +01:00
e1c87c149f
timestamping_timer: also reset counter
2021-02-02 13:25:45 +01:00
854ed29b1a
timestamp: pass overflows to the top and ignore them there
2021-02-02 12:34:20 +01:00
4475a2d040
timestamping: full u32 range
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The sampling timer and the timestamping timer have the same period.
The sampling interval and the batch size are powers of two.
If the timestamping timer wraps at a power of two larger than the
batch period, it will wrap in sync with the batch period.
Even if it didn't the RPLL would handle that. But it requires that the
timer wraps at the u32/i32 boundary (or be shifted left to wrap there).
2021-02-02 11:36:10 +01:00
299b443e5f
update cargosha256
2021-02-02 12:01:23 +08:00
69755305a9
rename cargosha256.nix to differentiate the binaries
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* nixpkgs 20.09 imposes that cargoSha256 also depends on the package name, while 726ee7aa82
2021-02-02 11:18:15 +08:00
6b02e84a5d
Merge pull request #254 from sergachev/master
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readme: fix source path and binary names
2021-02-01 23:47:07 +01:00
Ilia Sergachev
e9a471bec9
readme: fix source path and binary names
2021-02-01 23:38:41 +01:00
b1cd6342fb
Merge pull request #253 from quartiq/rj/lockin-test
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Rj/lockin test
2021-02-01 19:40:20 +01:00
2144af5bcd
configuration: update to HITL ips
2021-02-01 19:32:20 +01:00
24a4486847
lockin-internal: rotate samples
2021-02-01 19:31:57 +01:00
08cc2e4840
Merge pull request #252 from quartiq/rj/misc-cleanup
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Rj/misc cleanup
2021-02-01 19:10:59 +01:00
f02d3cc95b
dsp: clippy
2021-02-01 18:46:21 +01:00
2a84e3f299
dsp: remove unused code, let the compiler decide about inlining
2021-02-01 18:37:05 +01:00
5d7266abbc
dsp: clippy
2021-02-01 18:24:51 +01:00
9ee60824d4
lockin-internal: align processing with lockin-external
2021-02-01 18:15:51 +01:00
f9b5d29450
lockin: de-nest processing flow
2021-02-01 18:14:09 +01:00
b6e22b576b
iir: add const fn new()
2021-02-01 17:18:10 +01:00
656e3253ab
lockin-internal: document, streamline sequence
2021-02-01 17:09:06 +01:00
ab7e3d229b
rpll: clean up asserts
2021-02-01 16:01:05 +01:00
7e82fce4f0
Merge pull request #251 from quartiq/dsp-tweaks
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Dsp tweaks
2021-02-01 14:17:23 +01:00
65a3f839a0
lockin: remove feed()
2021-02-01 13:42:38 +01:00
90bd4741cc
dsp/benches: iir vec5
2021-02-01 13:27:49 +01:00
965c6335e1
dsp: fmt
2021-02-01 12:40:12 +01:00
7748d8eb54
dsp: constructor style
2021-02-01 12:37:44 +01:00
fdae9d54e8
Merge remote-tracking branch 'origin/master'
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* origin/master:
update cargosha256
build(deps): bump log from 0.4.13 to 0.4.14
build(deps): bump cortex-m-log from 0.6.2 to 0.7.0
build(deps): bump serde from 1.0.120 to 1.0.123
2021-02-01 12:28:01 +01:00
2c60103696
dsp: accu: add, iir: rename IIRState to Vec5
2021-02-01 12:23:47 +01:00
0fd4b167b4
complex/cossin: decouple modules
2021-02-01 12:07:03 +01:00
cc9110426a
update cargosha256
2021-02-01 17:47:32 +08:00
a8f2f81833
Merge pull request #250 from quartiq/dependabot/cargo/log-0.4.14
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build(deps): bump log from 0.4.13 to 0.4.14
2021-02-01 08:51:48 +01:00
dependabot[bot]
7e37ac7b02
build(deps): bump log from 0.4.13 to 0.4.14
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Bumps [log](https://github.com/rust-lang/log ) from 0.4.13 to 0.4.14.
- [Release notes](https://github.com/rust-lang/log/releases )
- [Changelog](https://github.com/rust-lang/log/blob/master/CHANGELOG.md )
- [Commits](https://github.com/rust-lang/log/compare/0.4.13...0.4.14 )
Signed-off-by: dependabot[bot] <support@github.com>
2021-01-31 22:28:52 +00:00
dependabot[bot]
8317185e07
build(deps): bump stm32h7xx-hal from 3da22d4 to 2b8a04c
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Bumps [stm32h7xx-hal](https://github.com/stm32-rs/stm32h7xx-hal ) from `3da22d4` to `2b8a04c`.
- [Release notes](https://github.com/stm32-rs/stm32h7xx-hal/releases )
- [Commits](3da22d4935...2b8a04caac
2021-01-31 22:28:48 +00:00
e3e97805ed
Merge pull request #238 from quartiq/dependabot/cargo/serde-1.0.123
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build(deps): bump serde from 1.0.120 to 1.0.123
2021-01-31 23:28:19 +01:00
7f37f276bf
Merge pull request #246 from quartiq/dependabot/cargo/cortex-m-log-0.7.0
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build(deps): bump cortex-m-log from 0.6.2 to 0.7.0
2021-01-31 23:28:04 +01:00
2d43b8970b
lockin: cleanup
2021-01-31 20:49:14 +01:00
1e3e46242d
Merge pull request #248 from quartiq/ci-lockin
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Ci lockin
2021-01-31 19:50:56 +01:00
0a25abf9e7
ci: smaller matrix, fix/add lockins
2021-01-31 19:31:09 +01:00
46a7d67027
lockin-internal: rename, adapt
2021-01-31 19:26:11 +01:00
6e1444f070
Merge pull request #247 from quartiq/dsp-iir-benches
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Dsp iir benches
2021-01-31 19:24:56 +01:00
8dc811da11
Merge pull request #240 from vertigo-designs/feature/lockin-app-refactor
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Adding internal lock-in integration demo
2021-01-31 19:14:08 +01:00
