2c60103696
dsp: accu: add, iir: rename IIRState to Vec5
2021-02-01 12:23:47 +01:00
0fd4b167b4
complex/cossin: decouple modules
2021-02-01 12:07:03 +01:00
2d43b8970b
lockin: cleanup
2021-01-31 20:49:14 +01:00
47089c267c
dsp: align iir and iir_int, add iir micro benches
2021-01-31 19:12:24 +01:00
43342cef91
rpll: docs
2021-01-31 18:21:47 +01:00
d281783f2e
rpll: reduce code
2021-01-31 18:10:13 +01:00
82c8fa1a07
rpll: extend tests
2021-01-31 17:10:03 +01:00
ab20d67a07
rpll: remove redundant time tracking
2021-01-31 13:42:15 +01:00
6b2d8169f0
rpll: more/cleaner tests
2021-01-31 13:25:01 +01:00
be7aad1b81
rpll: add unittest
2021-01-30 20:49:31 +01:00
0d1b237202
complex: richer API
2021-01-30 18:05:54 +01:00
36288225b3
rpll: extend to above-nyquist frequencies
2021-01-28 22:21:42 +01:00
1749d48ca3
Revert "rpll: auto-align counter"
...
This reverts commit dbacc5293e12f712fef7bd85848e1b0bd8fde823.
2021-01-27 09:01:07 +01:00
45e7d6de3c
rpll: auto-align counter
2021-01-27 09:01:07 +01:00
7c1fa9695a
iir lowpass: f32 is sufficient
2021-01-26 19:37:05 +01:00
73c98c947a
iir_int: remove spurious note
2021-01-26 19:23:23 +01:00
2b439a0231
lockin: remove broken tests, to be rewritten
2021-01-26 19:22:02 +01:00
d1f41b3ad5
int_iir: use taylor for lowpass
2021-01-26 19:19:09 +01:00
7b9fc3b2b3
iir_int: move lowpass coefficient calculation to iirstate
2021-01-26 18:51:20 +01:00
9b3a47e08b
rpll: refine, simplify, document and comment
2021-01-26 18:49:31 +01:00
ea7b08fc64
rpll: refine
2021-01-26 14:40:44 +01:00
16009c3b7e
rpll: update lockin integration test
2021-01-25 12:00:47 +01:00
9f9744b9e6
rpll: implement
2021-01-25 11:45:59 +01:00
df337f85b8
reciprocal_pll -> rpll
2021-01-25 09:54:56 +01:00
57a5c4ff9b
make lockin a unittest, not integration test
2021-01-22 16:04:02 +01:00
d0d2c6352d
lockin: refactor to use common lockin processing
2021-01-22 16:00:05 +01:00
0cd2140668
rafactor complex, cossin, atan2
2021-01-21 16:12:59 +01:00
948e58c910
lockin: refactor Lockin
2021-01-21 14:57:44 +01:00
20488ea3bc
lockin: refine
2021-01-19 11:01:21 +01:00
Matt Huszagh
9a3c9afa7e
fix reciprocal_pll divide error when reference frequency is 0
2021-01-14 14:51:07 -08:00
Matt Huszagh
9f0b3eb77e
fix shift_round overflow error
2021-01-14 14:51:07 -08:00
Matt Huszagh
9697560404
reciprocal_pll: remove unneeded type cast
2021-01-13 09:08:16 -08:00
Matt Huszagh
76088efda5
dsp: add reciprocal_pll
2021-01-13 08:37:33 -08:00
Matt Huszagh
80ed715f5a
shift sin/cos before demodulation product to avoid i64
2021-01-12 16:07:04 -08:00
Matt Huszagh
41ea2ebed4
use round up half integer rounding
2021-01-12 15:59:03 -08:00
Matt Huszagh
e14aa8b613
move lock-in code to main.rs
2021-01-12 10:45:34 -08:00
Matt Huszagh
891aad3f17
remove debug_assert in divide_round
2021-01-12 07:43:28 -08:00
Matt Huszagh
31d23a3e0c
lock-in: use same method for batch_index branching in both instances
2021-01-12 07:36:56 -08:00
Matt Huszagh
bae295140d
update lock-in for integer math and PLL
2021-01-12 07:36:56 -08:00
Matt Huszagh
13543ce048
pll update input is named "x" not "input"
2021-01-04 11:14:27 -08:00
cc42c0c477
iir_int: add optimized integer iir implementation
2020-12-22 16:49:12 +01:00
8d9af70c19
trig/atan2: refine
...
* use dynamic scaling of the inputs to get accurate ratios (effectively
floating point) to maintain accuracy for small arguments
* this also allows shifting later and keep more bits
* use u32 ratio to keep one more bit
* merge the corner case unittests into the big test value list
* print rms, absolute and axis-relative angle
* simplify the correction expression to get rid of one multiplication
* use 5 bit for the correction constant and 15 bits for r
* least squares optimal correction constant, this lowers the max error
below 5e-5
2020-12-20 21:07:23 +01:00
12d5945d81
dsp/testing: simplify
2020-12-20 20:23:32 +01:00
Matt Huszagh
7e794373f4
atan2: fix output range description
2020-12-17 14:21:39 -08:00
Matt Huszagh
17cf71f22b
atan2: replace min, max with x, y
2020-12-17 11:39:32 -08:00
Matt Huszagh
9c5e68ceea
atan2: test min and max angle inputs
2020-12-17 11:34:39 -08:00
Matt Huszagh
6ffc42021e
move atan2 test before cossin test to mimic function order
2020-12-17 10:09:12 -08:00
Matt Huszagh
09a744f59c
dsp: move iir generic math functions to top-level module scope
2020-12-17 10:04:48 -08:00
Matt Huszagh
56641d5838
atan2: specify why we cannot use more than 15 bits for the atan argument
2020-12-17 10:02:35 -08:00
Matt Huszagh
1f28949bc5
atan2: store sign bits and greater of |x| and |y|
2020-12-17 09:47:39 -08:00
Matt Huszagh
cb38c3e3bd
atan2: clarify sharing bits between atan argument and constant factors
2020-12-17 09:31:38 -08:00
Matt Huszagh
5717991ada
atan2: result range is from i32::MIN+1 to i32::MAX
2020-12-17 09:31:18 -08:00
Matt Huszagh
d7111a3aa8
dsp/trig: let compiler infer type parameter in atan2 abs call
2020-12-17 08:04:53 -08:00
Matt Huszagh
d9d500743f
simplify atan initial angle expression
2020-12-17 08:02:54 -08:00
Matt Huszagh
85ae70fe62
rename trig tests to delineate between cossin and atan2
2020-12-16 16:28:49 -08:00
Matt Huszagh
7c4f608206
move cossin and atan2 into the same trig file
2020-12-16 16:26:44 -08:00
Matt Huszagh
e257545321
fix formatting
2020-12-16 16:14:11 -08:00
Matt Huszagh
5d055b01a0
dsp: add atan2
2020-12-16 16:02:42 -08:00
Matt Huszagh
6d651da758
dsp: add f64 isclose testing function
2020-12-16 16:02:17 -08:00
Matt Huszagh
17f9f0750e
dsp: move abs to lib.rs
2020-12-16 16:01:50 -08:00
Matt Huszagh
e89db65722
rename trig.rs -> cossin.rs
2020-12-16 15:57:47 -08:00
469c89ea70
pll: refine gains
2020-12-14 09:58:27 +01:00
75c4120258
cossin: buffer test data output
2020-12-13 13:24:28 +01:00
7fa4b76e4d
cossin_table: fix build script usage
2020-12-10 17:17:09 +01:00
77cb0bbad0
cossin: refactor and tweak
...
* shrink the LUT by another bit
* correctly use the octant bit to offset the dphi to LUT entry midpoint
* add more diagnistics to the unittest and rewrite it in relative units
* MSB-align phase and output to match the PLL data, dynamic range and
remove the need for roudning bias.
* clean up the build.rs table generator a bit
2020-12-10 16:56:13 +01:00
Matt Huszagh
a82b0f3e90
trig: fix formatting
2020-12-09 15:53:56 -08:00
Matt Huszagh
4add34cf9a
add cossin LUT
2020-12-09 15:40:18 -08:00
2ae0bdfd8d
unwrap: comments, names
2020-12-06 17:07:38 +01:00
4cfe6ba416
pll: add note on dithering
2020-12-05 13:18:02 +01:00
974fa6e220
unwrap: clean up docs and names
2020-12-05 12:55:22 +01:00
526fea8e23
unwrap: more tests
2020-12-05 12:32:27 +01:00
941a94bbf6
dsp/pll: style
2020-12-05 11:44:09 +01:00
47806a155d
Merge branch 'master' into feature/unwrap
2020-12-05 09:58:15 +01:00
2179560a3c
unwrap: add phase unwrapping tools
2020-12-05 09:56:41 +01:00
628845d356
pll: rename to just PLL
2020-12-05 08:12:07 +01:00
0072cda85f
pll: add convergence test
2020-12-04 23:13:22 +01:00
Matt Huszagh
43a760e57a
dsp testing: improve api for tolerance checking
2020-12-04 09:16:10 -08:00
Matt Huszagh
55e7f1f0db
dsp: fix small comment grammar error
2020-12-04 09:16:10 -08:00
Matt Huszagh
0cca4589fd
lockin: compute reference period from the closest 2 timestamps to the ADC sample
2020-12-04 09:16:10 -08:00
Matt Huszagh
277a5d2d81
dsp: move common test code to testing.rs file
2020-12-04 09:16:09 -08:00
Matt Huszagh
260206e4f0
dsp: implement Complex as type alias for tuple
2020-12-04 09:15:33 -08:00
Matt Huszagh
d1b7efad48
dsp: replace in_phase and quadrature with Complex
2020-12-04 09:15:13 -08:00
Matt Huszagh
fcdfcb0be7
lockin: use single iir instance for both in-phase and quadrature signals
2020-12-04 09:14:39 -08:00
Matt Huszagh
785c98f93d
lockin: remove TIMESTAMP_BUFFER_SIZE constant
2020-12-04 09:14:39 -08:00
Matt Huszagh
90ef9f1e6a
lockin: borrow adc samples and timestamps as slices
2020-12-04 09:14:39 -08:00
Matt Huszagh
f259d6cf65
lockin: minor variable name changes
2020-12-04 09:14:39 -08:00
Matt Huszagh
9592bb74a7
lockin: change zip order in decimate for clarity
2020-12-04 09:14:39 -08:00
Matt Huszagh
4edda09d86
lockin: change demodulate to return result instead of option
2020-12-04 09:14:39 -08:00
Matt Huszagh
da4430e912
lockin: add documentation explaining timestamp decrement
2020-12-04 09:14:39 -08:00
Matt Huszagh
3c4e83bf0f
lockin: move fifo trait before use
...
This clarifies what it means to "push" to an array.
2020-12-04 09:14:39 -08:00
Matt Huszagh
85adc8b1e1
add lockin module
2020-12-04 09:14:37 -08:00
644d85c115
pll: init
2020-12-04 10:53:36 +01:00
74349e5d68
iir: more generic math helpers, use core::intrinsics
2020-11-27 10:36:30 +01:00
ea3e343c39
cargo fmt [nfc]
2020-11-26 14:30:09 +01:00
468929690d
iir: vminnm/vmaxnm
2020-11-26 14:26:44 +01:00
cc64f47004
iir: fmt [nfc]
2020-11-25 18:55:07 +01:00
38dfd48c14
iir: fix comment [nfc]
2020-11-25 17:57:24 +01:00
d9e4f6a052
iir: copy_within is better than rotate_right
2020-11-25 17:24:49 +01:00
6808d32e0f
iir: document
2020-11-23 08:49:30 +01:00
Matt Huszagh
3eb43c6b99
move iir to new dsp crate
2020-11-22 07:59:12 -08:00
