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@ -0,0 +1,518 @@
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//! Lock-in amplifier.
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//!
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//! Lock-in processing is performed through a combination of the
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//! following modular processing blocks: demodulation, filtering,
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//! decimation and computing the magnitude and phase from a complex
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//! signal. These processing blocks are mutually independent.
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//!
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//! # Terminology
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//!
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//! * _demodulation signal_ - A copy of the reference signal that is
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//! optionally frequency scaled and phase shifted. This is a complex
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//! signal. The demodulation signals are used to demodulate the ADC
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//! sampled signal.
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//! * _internal clock_ - A fast internal clock used to increment a
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//! counter for determining the 0-phase points of a reference signal.
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//! * _reference signal_ - A constant-frequency signal used to derive
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//! the demodulation signal.
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//! * _timestamp_ - Timestamps record the timing of the reference
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//! signal's 0-phase points. For instance, if a reference signal is
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//! provided externally, a fast internal clock increments a
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//! counter. When the external reference reaches the 0-phase point
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//! (e.g., a positive edge), the value of the counter is recorded as a
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//! timestamp. These timestamps are used to determine the frequency
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//! and phase of the reference signal.
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//!
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//! # Usage
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//!
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//! The first step is to initialize a `Lockin` instance with
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//! `Lockin::new()`. This provides the lock-in algorithms with
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//! necessary information about the demodulation and filtering steps,
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//! such as whether to demodulate with a harmonic of the reference
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//! signal and the IIR biquad filter to use. There are then 4
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//! different processing steps that can be used:
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//!
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//! * `demodulate` - Computes the phase of the demodulation signal
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//! corresponding to each ADC sample, uses this phase to compute the
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//! demodulation signal, and multiplies this demodulation signal by
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//! the ADC-sampled signal. This is a method of `Lockin` since it
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//! requires information about how to modify the reference signal for
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//! demodulation.
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//! * `filter` - Performs IIR biquad filtering of a complex
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//! signals. This is commonly performed on the signal provided by the
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//! demodulation step, but can be performed at any other point in the
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//! processing chain or omitted entirely. `filter` is a method of
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//! `Lockin` since it must hold onto the filter configuration and
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//! state.
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//! * `decimate` - This decimates a signal to reduce the load on the
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//! DAC output. It does not require any state information and is
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//! therefore a normal function.
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//! * `magnitude_phase` - Computes the magnitude and phase of the
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//! component of the ADC-sampled signal whose frequency is equal to
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//! the demodulation frequency. This does not require any state
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//! information and is therefore a normal function.
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use super::iir::{IIRState, IIR};
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use super::Complex;
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use core::f32::consts::PI;
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/// The number of ADC samples in one batch.
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pub const ADC_SAMPLE_BUFFER_SIZE: usize = 16;
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/// The number of outputs sent to the DAC for each ADC batch.
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pub const DECIMATED_BUFFER_SIZE: usize = 1;
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/// Treat the 2-element array as a FIFO. This allows new elements to
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/// be pushed into the array, existing elements to shift back in the
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/// array, and the last element to fall off the array.
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trait Fifo2<T> {
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fn push(&mut self, new_element: Option<T>);
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}
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impl<T: Copy> Fifo2<T> for [Option<T>; 2] {
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/// Push a new element into the array. The existing elements move
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/// backward in the array by one location, and the current last
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/// element is discarded.
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///
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/// # Arguments
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///
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/// * `new_element` - New element pushed into the front of the
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/// array.
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fn push(&mut self, new_element: Option<T>) {
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// For array sizes greater than 2 it would be preferable to
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// use a rotating index to avoid unnecessary data
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// copying. However, this would somewhat complicate the use of
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// iterators and for 2 elements, shifting is inexpensive.
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self[1] = self[0];
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self[0] = new_element;
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}
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}
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/// Performs lock-in amplifier processing of a signal.
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pub struct Lockin {
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phase_offset: f32,
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sample_period: u32,
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harmonic: u32,
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timestamps: [Option<i32>; 2],
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iir: IIR,
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iirstate: [IIRState; 2],
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}
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impl Lockin {
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/// Initialize a new `Lockin` instance.
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///
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/// # Arguments
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///
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/// * `phase_offset` - Phase offset (in radians) applied to the
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/// demodulation signal.
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/// * `sample_period` - ADC sampling period in terms of the
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/// internal clock period.
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/// * `harmonic` - Integer scaling factor used to adjust the
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/// demodulation frequency. E.g., 2 would demodulate with the
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/// first harmonic.
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/// * `iir` - IIR biquad filter.
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///
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/// # Returns
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///
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/// New `Lockin` instance.
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pub fn new(
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phase_offset: f32,
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sample_period: u32,
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harmonic: u32,
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iir: IIR,
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) -> Self {
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Lockin {
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phase_offset: phase_offset,
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sample_period: sample_period,
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harmonic: harmonic,
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timestamps: [None, None],
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iir: iir,
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iirstate: [[0.; 5]; 2],
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}
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}
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/// Demodulate an input signal with the complex reference signal.
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///
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/// # Arguments
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///
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/// * `adc_samples` - One batch of ADC samples.
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/// * `timestamps` - Counter values corresponding to the edges of
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/// an external reference signal. The counter is incremented by a
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/// fast internal clock.
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///
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/// # Returns
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///
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/// The demodulated complex signal as a `Result`. When there are
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/// an insufficient number of timestamps to perform processing,
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/// `Err` is returned.
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///
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/// # Assumptions
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///
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/// `demodulate` expects that the timestamp counter value is equal
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/// to 0 when the ADC samples its first input in a batch. This can
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/// be achieved by configuring the timestamp counter to overflow
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/// at the end of the ADC batch sampling period.
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pub fn demodulate(
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&mut self,
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adc_samples: &[i16],
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timestamps: &[u16],
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) -> Result<[Complex<f32>; ADC_SAMPLE_BUFFER_SIZE], &str> {
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let sample_period = self.sample_period as i32;
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// update old timestamps for new ADC batch
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self.timestamps.iter_mut().for_each(|t| match *t {
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Some(timestamp) => {
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// Existing timestamps have aged by one ADC batch
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// period since the last ADC batch.
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*t = Some(
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timestamp - ADC_SAMPLE_BUFFER_SIZE as i32 * sample_period,
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);
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}
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None => (),
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});
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// return prematurely if there aren't enough timestamps for
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// processing
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let old_timestamp_count =
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self.timestamps.iter().filter(|t| t.is_some()).count();
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if old_timestamp_count + timestamps.len() < 2 {
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return Err("insufficient timestamps");
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}
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let mut signal = [(0., 0.); ADC_SAMPLE_BUFFER_SIZE];
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// if we have not yet recorded any timestamps, the first
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// reference period must be computed from the first and
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// second timestamps in the array
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let mut timestamp_index: usize =
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if old_timestamp_count == 0 { 1 } else { 0 };
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// compute ADC sample phases, sines/cosines and demodulate
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signal
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.iter_mut()
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.zip(adc_samples.iter())
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.enumerate()
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.for_each(|(i, (s, sample))| {
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let adc_sample_count = i as i32 * sample_period;
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// index of the closest timestamp that occurred after
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// the current ADC sample
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let closest_timestamp_after_index: i32 = if timestamps.len() > 0
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{
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// Linear search is fast because both the timestamps
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// and ADC sample counts are sorted. Because of this,
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// we only need to check timestamps that were also
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// greater than the last ADC sample count.
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while timestamp_index < timestamps.len() - 1
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&& (timestamps[timestamp_index] as i32)
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< adc_sample_count
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{
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timestamp_index += 1;
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}
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timestamp_index as i32
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} else {
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-1
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};
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// closest timestamp that occurred before the current
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// ADC sample
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let closest_timestamp_before: i32;
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let reference_period = if closest_timestamp_after_index < 0 {
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closest_timestamp_before = self.timestamps[0].unwrap();
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closest_timestamp_before - self.timestamps[1].unwrap()
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} else if closest_timestamp_after_index == 0 {
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closest_timestamp_before = self.timestamps[0].unwrap();
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timestamps[0] as i32 - closest_timestamp_before
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} else {
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closest_timestamp_before = timestamps
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[(closest_timestamp_after_index - 1) as usize]
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as i32;
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timestamps[closest_timestamp_after_index as usize] as i32
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- closest_timestamp_before
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};
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let integer_phase: i32 = (adc_sample_count
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- closest_timestamp_before)
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* self.harmonic as i32;
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let phase = self.phase_offset
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+ 2. * PI * integer_phase as f32 / reference_period as f32;
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let (sine, cosine) = libm::sincosf(phase);
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let sample = *sample as f32;
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s.0 = sine * sample;
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s.1 = cosine * sample;
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});
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// record new timestamps
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let start_index: usize = if timestamps.len() < 2 {
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0
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} else {
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timestamps.len() - 2
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};
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timestamps[start_index..]
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.iter()
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.for_each(|t| self.timestamps.push(Some(*t as i32)));
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Ok(signal)
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}
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/// Filter the complex signal using the supplied biquad IIR. The
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/// signal array is modified in place.
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///
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/// # Arguments
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///
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/// * `signal` - Complex signal to filter.
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pub fn filter(&mut self, signal: &mut [Complex<f32>]) {
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signal.iter_mut().for_each(|s| {
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s.0 = self.iir.update(&mut self.iirstate[0], s.0);
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s.1 = self.iir.update(&mut self.iirstate[1], s.1);
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});
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}
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}
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/// Decimate the complex signal to `DECIMATED_BUFFER_SIZE`. The ratio
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/// of `ADC_SAMPLE_BUFFER_SIZE` to `DECIMATED_BUFFER_SIZE` must be a
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/// power of 2.
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///
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/// # Arguments
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///
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/// * `signal` - Complex signal to decimate.
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///
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/// # Returns
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///
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/// The decimated signal.
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pub fn decimate(
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signal: [Complex<f32>; ADC_SAMPLE_BUFFER_SIZE],
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) -> [Complex<f32>; DECIMATED_BUFFER_SIZE] {
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let n_k = ADC_SAMPLE_BUFFER_SIZE / DECIMATED_BUFFER_SIZE;
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debug_assert!(
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ADC_SAMPLE_BUFFER_SIZE == DECIMATED_BUFFER_SIZE || n_k % 2 == 0
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);
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let mut signal_decimated = [(0_f32, 0_f32); DECIMATED_BUFFER_SIZE];
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signal_decimated
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.iter_mut()
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.zip(signal.iter().step_by(n_k))
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.for_each(|(s_d, s)| {
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s_d.0 = s.0;
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s_d.1 = s.1;
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});
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signal_decimated
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}
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/// Compute the magnitude and phase from the complex signal. The
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/// signal array is modified in place.
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///
|
|
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/// # Arguments
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|
|
|
|
///
|
|
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|
|
/// * `signal` - Complex signal to decimate.
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|
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pub fn magnitude_phase(signal: &mut [Complex<f32>]) {
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signal.iter_mut().for_each(|s| {
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let new_i = libm::sqrtf([s.0, s.1].iter().map(|i| i * i).sum());
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let new_q = libm::atan2f(s.1, s.0);
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s.0 = new_i;
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s.1 = new_q;
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});
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}
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#[cfg(test)]
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mod tests {
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use super::*;
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use crate::testing::complex_allclose;
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#[test]
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|
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fn array_push() {
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|
|
|
let mut arr: [Option<u32>; 2] = [None, None];
|
|
|
|
|
arr.push(Some(1));
|
|
|
|
|
assert_eq!(arr, [Some(1), None]);
|
|
|
|
|
arr.push(Some(2));
|
|
|
|
|
assert_eq!(arr, [Some(2), Some(1)]);
|
|
|
|
|
arr.push(Some(10));
|
|
|
|
|
assert_eq!(arr, [Some(10), Some(2)]);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#[test]
|
|
|
|
|
fn magnitude_phase_length_1_quadrant_1() {
|
|
|
|
|
let mut signal: [Complex<f32>; 1] = [(1., 1.)];
|
|
|
|
|
magnitude_phase(&mut signal);
|
|
|
|
|
assert!(complex_allclose(
|
|
|
|
|
&signal,
|
|
|
|
|
&[(2_f32.sqrt(), PI / 4.)],
|
|
|
|
|
f32::EPSILON,
|
|
|
|
|
0.
|
|
|
|
|
));
|
|
|
|
|
|
|
|
|
|
signal = [(3_f32.sqrt() / 2., 1. / 2.)];
|
|
|
|
|
magnitude_phase(&mut signal);
|
|
|
|
|
assert!(complex_allclose(
|
|
|
|
|
&signal,
|
|
|
|
|
&[(1., PI / 6.)],
|
|
|
|
|
f32::EPSILON,
|
|
|
|
|
0.
|
|
|
|
|
));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#[test]
|
|
|
|
|
fn magnitude_phase_length_1_quadrant_2() {
|
|
|
|
|
let mut signal = [(-1., 1.)];
|
|
|
|
|
magnitude_phase(&mut signal);
|
|
|
|
|
assert!(complex_allclose(
|
|
|
|
|
&signal,
|
|
|
|
|
&[(2_f32.sqrt(), 3. * PI / 4.)],
|
|
|
|
|
f32::EPSILON,
|
|
|
|
|
0.
|
|
|
|
|
));
|
|
|
|
|
|
|
|
|
|
signal = [(-1. / 2., 3_f32.sqrt() / 2.)];
|
|
|
|
|
magnitude_phase(&mut signal);
|
|
|
|
|
assert!(complex_allclose(
|
|
|
|
|
&signal,
|
|
|
|
|
&[(1_f32, 2. * PI / 3.)],
|
|
|
|
|
f32::EPSILON,
|
|
|
|
|
0.
|
|
|
|
|
));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#[test]
|
|
|
|
|
fn magnitude_phase_length_1_quadrant_3() {
|
|
|
|
|
let mut signal = [(-1. / 2_f32.sqrt(), -1. / 2_f32.sqrt())];
|
|
|
|
|
magnitude_phase(&mut signal);
|
|
|
|
|
assert!(complex_allclose(
|
|
|
|
|
&signal,
|
|
|
|
|
&[(1_f32.sqrt(), -3. * PI / 4.)],
|
|
|
|
|
f32::EPSILON,
|
|
|
|
|
0.
|
|
|
|
|
));
|
|
|
|
|
|
|
|
|
|
signal = [(-1. / 2., -2_f32.sqrt())];
|
|
|
|
|
magnitude_phase(&mut signal);
|
|
|
|
|
assert!(complex_allclose(
|
|
|
|
|
&signal,
|
|
|
|
|
&[((3. / 2.) as f32, -1.91063323625 as f32)],
|
|
|
|
|
f32::EPSILON,
|
|
|
|
|
0.
|
|
|
|
|
));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#[test]
|
|
|
|
|
fn magnitude_phase_length_1_quadrant_4() {
|
|
|
|
|
let mut signal = [(1. / 2_f32.sqrt(), -1. / 2_f32.sqrt())];
|
|
|
|
|
magnitude_phase(&mut signal);
|
|
|
|
|
assert!(complex_allclose(
|
|
|
|
|
&signal,
|
|
|
|
|
&[(1_f32.sqrt(), -1. * PI / 4.)],
|
|
|
|
|
f32::EPSILON,
|
|
|
|
|
0.
|
|
|
|
|
));
|
|
|
|
|
|
|
|
|
|
signal = [(3_f32.sqrt() / 2., -1. / 2.)];
|
|
|
|
|
magnitude_phase(&mut signal);
|
|
|
|
|
assert!(complex_allclose(
|
|
|
|
|
&signal,
|
|
|
|
|
&[(1_f32, -PI / 6.)],
|
|
|
|
|
f32::EPSILON,
|
|
|
|
|
0.
|
|
|
|
|
));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#[test]
|
|
|
|
|
fn decimate_sample_16_decimated_1() {
|
|
|
|
|
let signal: [Complex<f32>; ADC_SAMPLE_BUFFER_SIZE] = [
|
|
|
|
|
(0.0, 1.6),
|
|
|
|
|
(0.1, 1.7),
|
|
|
|
|
(0.2, 1.8),
|
|
|
|
|
(0.3, 1.9),
|
|
|
|
|
(0.4, 2.0),
|
|
|
|
|
(0.5, 2.1),
|
|
|
|
|
(0.6, 2.2),
|
|
|
|
|
(0.7, 2.3),
|
|
|
|
|
(0.8, 2.4),
|
|
|
|
|
(0.9, 2.5),
|
|
|
|
|
(1.0, 2.6),
|
|
|
|
|
(1.1, 2.7),
|
|
|
|
|
(1.2, 2.8),
|
|
|
|
|
(1.3, 2.9),
|
|
|
|
|
(1.4, 3.0),
|
|
|
|
|
(1.5, 3.1),
|
|
|
|
|
];
|
|
|
|
|
assert_eq!(decimate(signal), [(0.0, 1.6)]);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#[test]
|
|
|
|
|
fn lockin_demodulate_valid_0() {
|
|
|
|
|
let mut lockin = Lockin::new(
|
|
|
|
|
0.,
|
|
|
|
|
200,
|
|
|
|
|
1,
|
|
|
|
|
IIR {
|
|
|
|
|
ba: [0_f32; 5],
|
|
|
|
|
y_offset: 0.,
|
|
|
|
|
y_min: -(1 << 15) as f32,
|
|
|
|
|
y_max: (1 << 15) as f32 - 1.,
|
|
|
|
|
},
|
|
|
|
|
);
|
|
|
|
|
assert_eq!(
|
|
|
|
|
lockin.demodulate(&[0; ADC_SAMPLE_BUFFER_SIZE], &[]),
|
|
|
|
|
Err("insufficient timestamps")
|
|
|
|
|
);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#[test]
|
|
|
|
|
fn lockin_demodulate_valid_1() {
|
|
|
|
|
let mut lockin = Lockin::new(
|
|
|
|
|
0.,
|
|
|
|
|
200,
|
|
|
|
|
1,
|
|
|
|
|
IIR {
|
|
|
|
|
ba: [0_f32; 5],
|
|
|
|
|
y_offset: 0.,
|
|
|
|
|
y_min: -(1 << 15) as f32,
|
|
|
|
|
y_max: (1 << 15) as f32 - 1.,
|
|
|
|
|
},
|
|
|
|
|
);
|
|
|
|
|
assert_eq!(
|
|
|
|
|
lockin.demodulate(&[0; ADC_SAMPLE_BUFFER_SIZE], &[0],),
|
|
|
|
|
Err("insufficient timestamps")
|
|
|
|
|
);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#[test]
|
|
|
|
|
fn lockin_demodulate_valid_2() {
|
|
|
|
|
let adc_period: u32 = 200;
|
|
|
|
|
let mut lockin = Lockin::new(
|
|
|
|
|
0.,
|
|
|
|
|
adc_period,
|
|
|
|
|
1,
|
|
|
|
|
IIR {
|
|
|
|
|
ba: [0_f32; 5],
|
|
|
|
|
y_offset: 0.,
|
|
|
|
|
y_min: -(1 << 15) as f32,
|
|
|
|
|
y_max: (1 << 15) as f32 - 1.,
|
|
|
|
|
},
|
|
|
|
|
);
|
|
|
|
|
let adc_samples: [i16; ADC_SAMPLE_BUFFER_SIZE] =
|
|
|
|
|
[-8, 7, -7, 6, -6, 5, -5, 4, -4, 3, -3, 2, -2, -1, 1, 0];
|
|
|
|
|
let reference_period: u16 = 2800;
|
|
|
|
|
let initial_phase_integer: u16 = 200;
|
|
|
|
|
let timestamps: &[u16] = &[
|
|
|
|
|
initial_phase_integer,
|
|
|
|
|
initial_phase_integer + reference_period,
|
|
|
|
|
];
|
|
|
|
|
let initial_phase: f32 =
|
|
|
|
|
-(initial_phase_integer as f32) / reference_period as f32 * 2. * PI;
|
|
|
|
|
let phase_increment: f32 =
|
|
|
|
|
adc_period as f32 / reference_period as f32 * 2. * PI;
|
|
|
|
|
let mut signal = [(0., 0.); ADC_SAMPLE_BUFFER_SIZE];
|
|
|
|
|
for (n, s) in signal.iter_mut().enumerate() {
|
|
|
|
|
let adc_phase = initial_phase + n as f32 * phase_increment;
|
|
|
|
|
let sine = adc_phase.sin();
|
|
|
|
|
let cosine = adc_phase.cos();
|
|
|
|
|
s.0 = sine * adc_samples[n] as f32;
|
|
|
|
|
s.1 = cosine * adc_samples[n] as f32;
|
|
|
|
|
}
|
|
|
|
|
let result = lockin.demodulate(&adc_samples, timestamps).unwrap();
|
|
|
|
|
assert!(
|
|
|
|
|
complex_allclose(&result, &signal, 0., 1e-5),
|
|
|
|
|
"\nsignal computed: {:?},\nsignal expected: {:?}",
|
|
|
|
|
result,
|
|
|
|
|
signal
|
|
|
|
|
);
|
|
|
|
|
}
|
|
|
|
|
}
|
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