Matt Huszagh
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3125365a15
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add atan2 host benchmark
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2020-12-17 14:01:57 -08:00 |
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Matt Huszagh
|
17cf71f22b
|
atan2: replace min, max with x, y
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2020-12-17 11:39:32 -08:00 |
|
Matt Huszagh
|
9c5e68ceea
|
atan2: test min and max angle inputs
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2020-12-17 11:34:39 -08:00 |
|
Matt Huszagh
|
6ffc42021e
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move atan2 test before cossin test to mimic function order
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2020-12-17 10:09:12 -08:00 |
|
Matt Huszagh
|
09a744f59c
|
dsp: move iir generic math functions to top-level module scope
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2020-12-17 10:04:48 -08:00 |
|
Matt Huszagh
|
56641d5838
|
atan2: specify why we cannot use more than 15 bits for the atan argument
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2020-12-17 10:02:35 -08:00 |
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Matt Huszagh
|
1f28949bc5
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atan2: store sign bits and greater of |x| and |y|
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2020-12-17 09:47:39 -08:00 |
|
Matt Huszagh
|
cb38c3e3bd
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atan2: clarify sharing bits between atan argument and constant factors
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2020-12-17 09:31:38 -08:00 |
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Matt Huszagh
|
5717991ada
|
atan2: result range is from i32::MIN+1 to i32::MAX
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2020-12-17 09:31:18 -08:00 |
|
Matt Huszagh
|
d7111a3aa8
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dsp/trig: let compiler infer type parameter in atan2 abs call
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2020-12-17 08:04:53 -08:00 |
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Matt Huszagh
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d9d500743f
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simplify atan initial angle expression
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2020-12-17 08:02:54 -08:00 |
 Ryan Summers
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ee8f4d849f
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Adding documentation about double-buffered mode to DACs
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2020-12-17 14:32:53 +01:00 |
|
Ryan Summers
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fb1ea765ce
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Updating DACs to utilize DBM
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2020-12-17 14:27:47 +01:00 |
|
Ryan Summers
|
ec2aaecb48
|
Adding safety documentation
|
2020-12-17 14:11:28 +01:00 |
|
Ryan Summers
|
8fb37c2db9
|
Adding docs
|
2020-12-17 14:10:36 +01:00 |
|
Ryan Summers
|
438b291974
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Updating DAC output format, adding DDS stream docs
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2020-12-17 14:09:18 +01:00 |
|
Matt Huszagh
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2ddaab8fae
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dsp: fix bench import path
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2020-12-16 16:57:18 -08:00 |
|
Matt Huszagh
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85ae70fe62
|
rename trig tests to delineate between cossin and atan2
|
2020-12-16 16:28:49 -08:00 |
|
Matt Huszagh
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7c4f608206
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move cossin and atan2 into the same trig file
|
2020-12-16 16:26:44 -08:00 |
|
Matt Huszagh
|
e257545321
|
fix formatting
|
2020-12-16 16:14:11 -08:00 |
|
Matt Huszagh
|
5d055b01a0
|
dsp: add atan2
|
2020-12-16 16:02:42 -08:00 |
|
Matt Huszagh
|
6d651da758
|
dsp: add f64 isclose testing function
|
2020-12-16 16:02:17 -08:00 |
|
Matt Huszagh
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17f9f0750e
|
dsp: move abs to lib.rs
|
2020-12-16 16:01:50 -08:00 |
|
Matt Huszagh
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e89db65722
|
rename trig.rs -> cossin.rs
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2020-12-16 15:57:47 -08:00 |
|
Ryan Summers
|
8e4a7c8fa9
|
Adding documentation for ADCs and DACs
|
2020-12-15 16:46:12 +01:00 |
|
Ryan Summers
|
fc81f3d55d
|
Removing DMA support from DI0 timestamping
|
2020-12-15 14:34:14 +01:00 |
|
Ryan Summers
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352884ea06
|
Fixing pounder timestamps after manual testing
|
2020-12-15 13:13:05 +01:00 |
bors[bot]
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a71f790574
|
Merge #205
205: pll: refine gains r=jordens a=jordens
this decouples frequency and phase gain
Co-authored-by: Robert Jördens <rj@quartiq.de>
|
2020-12-15 11:19:34 +00:00 |
 Robert Jördens
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469c89ea70
|
pll: refine gains
|
2020-12-14 09:58:27 +01:00 |
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bors[bot]
|
1425608647
|
Merge #202
202: Fix/rj misc r=jordens a=jordens
Co-authored-by: Robert Jördens <rj@quartiq.de>
|
2020-12-13 12:26:14 +00:00 |
|
Robert Jördens
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75c4120258
|
cossin: buffer test data output
|
2020-12-13 13:24:28 +01:00 |
|
Robert Jördens
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4fc1f4397e
|
gha: upload only relevant
|
2020-12-13 13:24:28 +01:00 |
 Sebastien Bourdeauducq
|
107a4ac96f
|
update cargosha256
|
2020-12-12 16:33:37 +08:00 |
|
bors[bot]
|
9a0e47c7eb
|
Merge #201
201: cossin bench: be fair to glibc r=jordens a=jordens
Co-authored-by: Robert Jördens <rj@quartiq.de>
|
2020-12-11 18:21:31 +00:00 |
|
Robert Jördens
|
d271dccaba
|
cossin bench: be fair to glibc
|
2020-12-11 19:08:11 +01:00 |
|
bors[bot]
|
e3ab2b2db5
|
Merge #200
200: dsp: add host benchmark r=jordens a=jordens
Co-authored-by: Robert Jördens <rj@quartiq.de>
|
2020-12-11 17:35:30 +00:00 |
|
Robert Jördens
|
f8b121600e
|
gha: add rust to artifact name
|
2020-12-11 18:34:42 +01:00 |
|
Robert Jördens
|
193b8e2228
|
gha: upload-artifacts@v2
|
2020-12-11 18:22:16 +01:00 |
|
Robert Jördens
|
3b7d90fb45
|
gha: artifact tweak
|
2020-12-11 18:07:15 +01:00 |
|
Robert Jördens
|
028ff3847d
|
upload artifacts
|
2020-12-11 17:36:10 +01:00 |
|
Robert Jördens
|
a70110d8cc
|
gha: fix artifact
|
2020-12-11 17:27:02 +01:00 |
|
Robert Jördens
|
d4fceea5d1
|
cossin: bench against (i32 as f32).sin_cos()
|
2020-12-11 17:26:50 +01:00 |
|
Robert Jördens
|
5cd93d3318
|
fmt
|
2020-12-11 17:08:16 +01:00 |
|
Robert Jördens
|
a709ab171e
|
gha: fix bors
|
2020-12-11 17:06:07 +01:00 |
|
Robert Jördens
|
4fbd729cb4
|
gha: fix toolchain components
|
2020-12-11 17:04:34 +01:00 |
|
Robert Jördens
|
a85738a651
|
dsp: add host benchmark
|
2020-12-11 15:19:13 +01:00 |
|
Robert Jördens
|
a53da3dc84
|
Merge pull request #199 from quartiq/feature/cossin-tuneup
Feature/cossin tuneup
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2020-12-10 18:38:11 +01:00 |
|
Robert Jördens
|
f6ca79a992
|
Merge pull request #198 from quartiq/dependabot/cargo/paste-1.0.4
build(deps): bump paste from 1.0.3 to 1.0.4
|
2020-12-10 18:05:03 +01:00 |
|
Robert Jördens
|
de304c503b
|
cargo: go back to target-cpu=cortex-m4
Appears to give better code.
Test by matthusagh.
|
2020-12-10 17:53:45 +01:00 |
|
Robert Jördens
|
72b7e72040
|
gitignore: no need to ignore table, is in OUT_DIR now
|
2020-12-10 17:49:46 +01:00 |