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7b9fc3b2b3
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iir_int: move lowpass coefficient calculation to iirstate
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2021-01-26 18:51:20 +01:00 |
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ea7b08fc64
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rpll: refine
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2021-01-26 14:40:44 +01:00 |
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9f9744b9e6
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rpll: implement
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2021-01-25 11:45:59 +01:00 |
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df337f85b8
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reciprocal_pll -> rpll
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2021-01-25 09:54:56 +01:00 |
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57a5c4ff9b
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make lockin a unittest, not integration test
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2021-01-22 16:04:02 +01:00 |
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d0d2c6352d
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lockin: refactor to use common lockin processing
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2021-01-22 16:00:05 +01:00 |
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0cd2140668
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rafactor complex, cossin, atan2
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2021-01-21 16:12:59 +01:00 |
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948e58c910
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lockin: refactor Lockin
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2021-01-21 14:57:44 +01:00 |
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5af2b9c63a
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fmt
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2021-01-20 15:34:56 +01:00 |
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c078de05cc
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lockin: fix adc value conversion
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2021-01-20 15:31:46 +01:00 |
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d014ed0fe0
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add lockin bin
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2021-01-20 14:29:29 +01:00 |
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603d6df6a4
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Merge branch 'master' into lockin-bin
* master:
Reordering lib.rs
Removing main.rs
Adding support for multiple applications
Fixing build
Moving panic configuration
Reordering
Refactoring to support multiple apps
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2021-01-20 14:19:28 +01:00 |
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507e334ec5
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lockin: tweak impl
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2021-01-20 14:07:57 +01:00 |
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4d0b1b5566
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Reordering lib.rs
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2021-01-20 13:44:53 +01:00 |
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86355c9c5d
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Removing main.rs
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2021-01-20 13:44:16 +01:00 |
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26677063ea
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Adding support for multiple applications
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2021-01-20 13:43:34 +01:00 |
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778f4ac4d5
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lockin: wrapping_neg
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2021-01-19 11:30:12 +01:00 |
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720b143132
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Merge remote-tracking branch 'origin/master' into lockin-bin
* origin/master:
Updating timer compare offsets
Removing dac isr clear
Adding information about DSP timing specifications
Specifying consequences of failing to meet timing
Updating dependencies
Apply suggestions from code review
Adding documentation about double-buffered mode to DACs
Updating DACs to utilize DBM
Adding safety documentation
Adding docs
Updating DAC output format, adding DDS stream docs
Adding documentation for ADCs and DACs
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2021-01-19 11:12:50 +01:00 |
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20488ea3bc
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lockin: refine
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2021-01-19 11:01:21 +01:00 |
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573189bdd9
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Fixing build
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2021-01-18 17:23:21 +01:00 |
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6618e921fe
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Moving panic configuration
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2021-01-18 16:55:56 +01:00 |
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8dd72ae75e
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Reordering
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2021-01-18 16:52:09 +01:00 |
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20535a721d
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Refactoring to support multiple apps
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2021-01-18 16:47:47 +01:00 |
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7a2f950667
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Updating timer compare offsets
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2021-01-18 13:41:23 +01:00 |
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598a48b178
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Merge branch 'master' into feature/io-docs
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2021-01-18 13:25:03 +01:00 |
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Matt Huszagh
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f0eb58dfb2
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swap sin and cos for demodulation
The in-phase component should be multiplied by the sin value and the
quadrature component should be multiplied by the cos value.
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2021-01-14 14:51:07 -08:00 |
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Matt Huszagh
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9d0aa40ce8
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Revert "revert changes in main.rs and server.rs"
This reverts commit e599977983.
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2021-01-13 09:54:04 -08:00 |
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Matt Huszagh
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e599977983
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revert changes in main.rs and server.rs
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2021-01-13 08:59:27 -08:00 |
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Matt Huszagh
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76088efda5
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dsp: add reciprocal_pll
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2021-01-13 08:37:33 -08:00 |
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Matt Huszagh
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6aad92af43
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fix bug in which real signal component is assigned twice
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2021-01-12 18:36:18 -08:00 |
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Matt Huszagh
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07b7201b49
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fix cargo fmt style
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2021-01-12 17:26:42 -08:00 |
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Matt Huszagh
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a0d472b398
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use only integer iir
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2021-01-12 17:21:55 -08:00 |
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Matt Huszagh
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f974f4099c
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remove TODO note relating ADC_BATCHES and calculate_timestamp_timer_period
Having both is not really redundant.
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2021-01-12 16:17:58 -08:00 |
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Matt Huszagh
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80ed715f5a
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shift sin/cos before demodulation product to avoid i64
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2021-01-12 16:07:04 -08:00 |
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Matt Huszagh
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41ea2ebed4
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use round up half integer rounding
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2021-01-12 15:59:03 -08:00 |
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Matt Huszagh
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4c033c0f3e
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move timestamp handling into new TimestampHandler struct
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2021-01-12 13:06:49 -08:00 |
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Matt Huszagh
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e14aa8b613
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move lock-in code to main.rs
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2021-01-12 10:45:34 -08:00 |
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Matt Huszagh
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028f4a1bb2
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fix small typos
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2021-01-12 07:36:56 -08:00 |
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Ryan Summers
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db3a42a7b9
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Update src/adc.rs
Co-authored-by: Robert Jördens <rj@quartiq.de>
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2021-01-12 06:54:16 -08:00 |
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bcf7a59993
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Removing dac isr clear
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2021-01-12 14:15:45 +01:00 |
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09ecd3291a
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Merge branch 'rs/issue-219/adc-setup' into feature/io-docs
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2021-01-12 14:02:19 +01:00 |
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6b170c25ed
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Fixing timing synchronization
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2021-01-12 13:29:15 +01:00 |
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91975993cf
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Fixing docs
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2021-01-11 12:38:20 +01:00 |
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d5c21efc9d
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Adding extra DMA transfer to clear TXTF in ADC SPI transfers
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2021-01-11 12:31:15 +01:00 |
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5eab732d93
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Adding information about DSP timing specifications
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2021-01-06 15:38:04 +01:00 |
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56366a013f
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Specifying consequences of failing to meet timing
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2021-01-06 15:34:12 +01:00 |
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4b3ceb0c0b
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Merge branch 'feature/io-docs' of github.com:vertigo-designs/stabilizer into feature/io-docs
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2021-01-06 15:12:25 +01:00 |
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eefb2acfda
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Updating dependencies
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2021-01-06 15:12:03 +01:00 |
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cd4721b506
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Merge branch 'master' into feature/io-docs
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2021-01-06 15:10:30 +01:00 |
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Ryan Summers
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f825f52785
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Apply suggestions from code review
Co-authored-by: Robert Jördens <rj@quartiq.de>
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2021-01-06 06:08:07 -08:00 |
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