bors[bot]
2f122d12fa
Merge #207
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207: atan r=jordens a=matthuszagh
Adds 2-argument arctangent function. Parameters and result are `i32` integers for fast computation. Only the 16 MSBs of the inputs are used (16 LSBs are discarded). The x and y inputs can range from -1 to 1, which corresponds to `i32::MIN` and `i32::MAX`, respectively. The output ranges from -pi to pi, which corresponds to `i32::MIN` and `i32::MAX`, respectively.
- [godbolt](https://rust.godbolt.org/z/nahKrT )
# Related
- #206
Co-authored-by: Matt Huszagh <huszaghmatt@gmail.com>
2020-12-17 22:28:55 +00:00
Matt Huszagh
7e794373f4
atan2: fix output range description
2020-12-17 14:21:39 -08:00
Matt Huszagh
3125365a15
add atan2 host benchmark
2020-12-17 14:01:57 -08:00
Matt Huszagh
17cf71f22b
atan2: replace min, max with x, y
2020-12-17 11:39:32 -08:00
Matt Huszagh
9c5e68ceea
atan2: test min and max angle inputs
2020-12-17 11:34:39 -08:00
Matt Huszagh
6ffc42021e
move atan2 test before cossin test to mimic function order
2020-12-17 10:09:12 -08:00
Matt Huszagh
09a744f59c
dsp: move iir generic math functions to top-level module scope
2020-12-17 10:04:48 -08:00
Matt Huszagh
56641d5838
atan2: specify why we cannot use more than 15 bits for the atan argument
2020-12-17 10:02:35 -08:00
Matt Huszagh
1f28949bc5
atan2: store sign bits and greater of |x| and |y|
2020-12-17 09:47:39 -08:00
Matt Huszagh
cb38c3e3bd
atan2: clarify sharing bits between atan argument and constant factors
2020-12-17 09:31:38 -08:00
Matt Huszagh
5717991ada
atan2: result range is from i32::MIN+1 to i32::MAX
2020-12-17 09:31:18 -08:00
Matt Huszagh
d7111a3aa8
dsp/trig: let compiler infer type parameter in atan2 abs call
2020-12-17 08:04:53 -08:00
Matt Huszagh
d9d500743f
simplify atan initial angle expression
2020-12-17 08:02:54 -08:00
ee8f4d849f
Adding documentation about double-buffered mode to DACs
2020-12-17 14:32:53 +01:00
fb1ea765ce
Updating DACs to utilize DBM
2020-12-17 14:27:47 +01:00
ec2aaecb48
Adding safety documentation
2020-12-17 14:11:28 +01:00
8fb37c2db9
Adding docs
2020-12-17 14:10:36 +01:00
438b291974
Updating DAC output format, adding DDS stream docs
2020-12-17 14:09:18 +01:00
Matt Huszagh
2ddaab8fae
dsp: fix bench import path
2020-12-16 16:57:18 -08:00
Matt Huszagh
85ae70fe62
rename trig tests to delineate between cossin and atan2
2020-12-16 16:28:49 -08:00
Matt Huszagh
7c4f608206
move cossin and atan2 into the same trig file
2020-12-16 16:26:44 -08:00
Matt Huszagh
e257545321
fix formatting
2020-12-16 16:14:11 -08:00
Matt Huszagh
5d055b01a0
dsp: add atan2
2020-12-16 16:02:42 -08:00
Matt Huszagh
6d651da758
dsp: add f64 isclose testing function
2020-12-16 16:02:17 -08:00
Matt Huszagh
17f9f0750e
dsp: move abs to lib.rs
2020-12-16 16:01:50 -08:00
Matt Huszagh
e89db65722
rename trig.rs -> cossin.rs
2020-12-16 15:57:47 -08:00
8e4a7c8fa9
Adding documentation for ADCs and DACs
2020-12-15 16:46:12 +01:00
fc81f3d55d
Removing DMA support from DI0 timestamping
2020-12-15 14:34:14 +01:00
352884ea06
Fixing pounder timestamps after manual testing
2020-12-15 13:13:05 +01:00
bors[bot]
a71f790574
Merge #205
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205: pll: refine gains r=jordens a=jordens
this decouples frequency and phase gain
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-12-15 11:19:34 +00:00
469c89ea70
pll: refine gains
2020-12-14 09:58:27 +01:00
bors[bot]
1425608647
Merge #202
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202: Fix/rj misc r=jordens a=jordens
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-12-13 12:26:14 +00:00
75c4120258
cossin: buffer test data output
2020-12-13 13:24:28 +01:00
4fc1f4397e
gha: upload only relevant
2020-12-13 13:24:28 +01:00
107a4ac96f
update cargosha256
2020-12-12 16:33:37 +08:00
bors[bot]
9a0e47c7eb
Merge #201
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201: cossin bench: be fair to glibc r=jordens a=jordens
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-12-11 18:21:31 +00:00
d271dccaba
cossin bench: be fair to glibc
2020-12-11 19:08:11 +01:00
bors[bot]
e3ab2b2db5
Merge #200
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200: dsp: add host benchmark r=jordens a=jordens
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-12-11 17:35:30 +00:00
f8b121600e
gha: add rust to artifact name
2020-12-11 18:34:42 +01:00
193b8e2228
gha: upload-artifacts@v2
2020-12-11 18:22:16 +01:00
3b7d90fb45
gha: artifact tweak
2020-12-11 18:07:15 +01:00
028ff3847d
upload artifacts
2020-12-11 17:36:10 +01:00
a70110d8cc
gha: fix artifact
2020-12-11 17:27:02 +01:00
d4fceea5d1
cossin: bench against (i32 as f32).sin_cos()
2020-12-11 17:26:50 +01:00
5cd93d3318
fmt
2020-12-11 17:08:16 +01:00
a709ab171e
gha: fix bors
2020-12-11 17:06:07 +01:00
4fbd729cb4
gha: fix toolchain components
2020-12-11 17:04:34 +01:00
a85738a651
dsp: add host benchmark
2020-12-11 15:19:13 +01:00
a53da3dc84
Merge pull request #199 from quartiq/feature/cossin-tuneup
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Feature/cossin tuneup
2020-12-10 18:38:11 +01:00
f6ca79a992
Merge pull request #198 from quartiq/dependabot/cargo/paste-1.0.4
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build(deps): bump paste from 1.0.3 to 1.0.4
2020-12-10 18:05:03 +01:00
