Commit Graph

44 Commits

Author SHA1 Message Date
mwojcik 627504b60e test_dma: remove redundant clock 2023-01-11 12:02:51 +08:00
Sebastien Bourdeauducq ec893222a4 rtio: remove support for async mode 2023-01-06 18:22:05 +08:00
mwojcik f8eb695c0f dma test: no more rsys or rtio domains 2022-11-01 08:12:54 +08:00
occheung 09945ecc4d gateware: fix drtio/dma tests 2021-11-08 16:59:08 +08:00
Robert Jördens 30d1acee9f fastlink: fix fastino style link 2020-10-18 20:43:21 +00:00
Robert Jördens d98357051c add ref data 2020-10-18 20:43:21 +00:00
Robert Jördens 139385a571 fastlink: add fastino test 2020-10-18 17:11:09 +00:00
Robert Jördens bcefb06e19 phaser: ddb template, split crc 2020-08-24 14:51:50 +00:00
Robert Jördens 11c9def589 phaser: readback delay, test fastlink 2020-08-24 14:49:36 +00:00
David Nadlinger a565f77538 Add gateware input event counter 2019-01-15 10:55:07 +00:00
Sebastien Bourdeauducq 8caea0e6d3 gateware,runtime: optimize RTIO kernel interface further
* now pinning (TODO: atomicity)
* for inputs, merge request and timeout registers
2018-11-08 18:29:24 +08:00
Sebastien Bourdeauducq d38755feff drtio: implement destination state checks on operations 2018-09-15 15:55:45 +08:00
Sebastien Bourdeauducq f3fe818049 rtio: refactor TSC to allow sharing between cores 2018-09-03 09:48:12 +08:00
Sebastien Bourdeauducq 5f0cfadb30 rtio/sed: add unittest for sequence number rollover 2018-05-02 12:04:30 +08:00
Sebastien Bourdeauducq bce8fa3ec5 rtio/sed: add replace unittest at the top level (#978) 2018-05-02 10:58:18 +08:00
Sebastien Bourdeauducq c8020f6bbd ttl_serdes_generic: fix/upgrade test 2018-03-20 16:46:57 +08:00
Robert Jördens 2cbd597416 LaneDistributor: style and signal consolidation [NFC] 2018-03-07 11:34:42 +00:00
Sebastien Bourdeauducq d747d74cb3 test: fix test_dma 2018-03-04 23:19:06 +08:00
Sebastien Bourdeauducq 928d5dc9b3 drtio: raise RTIOLinkError if operation fails due to link lost (#942) 2018-03-04 01:02:53 +08:00
Sebastien Bourdeauducq 893be82ad1 rtio/dma: raise underflow in test 2017-10-09 10:22:58 +08:00
Sebastien Bourdeauducq a9c9d5779d rtio/dma: add full-stack test with connection to RTIO core 2017-10-08 22:38:02 +08:00
Sebastien Bourdeauducq 5437f0e3e3 rtio: make sequence errors consistently asychronous 2017-09-29 14:40:06 +08:00
Sebastien Bourdeauducq e6f0ce3aba rtio/sed: test latency compensation 2017-09-26 16:11:21 +08:00
Sebastien Bourdeauducq f079ac6af6 rtio/sed: disable wait in TestLaneDistributor.test_regular 2017-09-26 16:10:52 +08:00
Sebastien Bourdeauducq 4112e403de rtio/sed: latency compensation 2017-09-26 15:09:07 +08:00
Sebastien Bourdeauducq 63e39dec94 style 2017-09-20 11:26:12 +08:00
Sebastien Bourdeauducq 06a0707c00 rtio: add simulation unit test for input collector 2017-09-19 15:30:44 +08:00
Sebastien Bourdeauducq 81d6317053 rtio/sed: take global fine TS width 2017-09-18 11:30:49 +08:00
Sebastien Bourdeauducq 25c644c663 rtio/sed: add top-level core unit test 2017-09-16 14:05:08 +08:00
Sebastien Bourdeauducq ac52c7c818 rtio/sed/LaneDistributor: style 2017-09-16 14:02:37 +08:00
Sebastien Bourdeauducq 7b299ba583 rtio/sed: remove obsolete ofifo_depth from test_output_driver 2017-09-16 14:01:19 +08:00
Sebastien Bourdeauducq 8e5ab90129 rtio/sed: add FIFO wrapper 2017-09-15 15:36:34 +08:00
Sebastien Bourdeauducq 1b61442bc3 rtio/sed: fix lane spreading and enable by default 2017-09-13 22:48:10 +08:00
Sebastien Bourdeauducq feec6298a5 rtio/sed: add lane distributor simulation unittest 2017-09-13 18:00:16 +08:00
Sebastien Bourdeauducq faf54127ac rtio/sed: remove VCD fine in unittest 2017-09-11 23:07:09 +08:00
Sebastien Bourdeauducq a2b7894134 rtio/sed: add output driver simulation unittest 2017-09-11 23:05:10 +08:00
Sebastien Bourdeauducq 64d9381c36 rtio/sed: remove uneeded yield in test_sed_output_network 2017-09-11 23:02:56 +08:00
Sebastien Bourdeauducq 1d2ebbe60f rtio/sed: make ON payload layout configurable, add latency function 2017-09-11 09:06:40 +08:00
Sebastien Bourdeauducq 527b403bb1 rtio/sed: add output network simulation unittest 2017-09-10 23:41:20 +08:00
Sebastien Bourdeauducq 200c499114 test: change base address in DMA simulation testbench 2017-03-31 13:17:00 +08:00
whitequark 4de336fbe9 gateware: reverse bytes of SDRAM word, not bits. 2017-03-17 11:16:46 +00:00
whitequark 6b63322106 gateware: reverse SDRAM words in RTIO DMA engine. 2017-03-17 07:29:28 +00:00
Sebastien Bourdeauducq 1e6a33b586 rtio: handle input timeout in gateware
The information passed by the runtime will be used by the DRTIO core
to poll the remote side appropriately.
2017-03-03 17:37:47 +08:00
Sebastien Bourdeauducq 657afd770e artiq/test/gateware -> artiq/gateware/test
This allows gateware simulations to be skipped or not considered for coverage when using test discovery.
2017-01-30 09:00:55 +08:00