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Commit Graph

4621 Commits

Author SHA1 Message Date
0e41725e2d pdq2: sync with pdq2 2016-10-18 09:43:46 +02:00
69099691f7 doc: clarify usage of pause/check_pause, closes #571 2016-10-17 20:08:15 +08:00
02adccf4a2 dashboard/datasets: use scientific spinbox and increase number of decimals, closes #572 2016-10-17 19:57:59 +08:00
e7dbed3b02 gateware: KC705 satellite target 2016-10-17 19:23:45 +08:00
9752ffe3d1 drtio: various fixes 2016-10-17 19:23:08 +08:00
cce29e8b83 gateware/spi: fix import 2016-10-17 14:47:19 +08:00
b6002529cf gateware/spi: fix import 2016-10-17 14:07:11 +08:00
85834976d9 gateware/spi: fix import 2016-10-17 14:06:35 +08:00
whitequark
6da1f39670 runtime: fix use of $(realpath) in Makefile. 2016-10-17 00:11:02 +00:00
whitequark
f10a4498c7 test: fix printf specifier. 2016-10-16 23:54:29 +00:00
whitequark
2a9e370840 llvm_ir_generator: make sure RPC allocations are not underaligned. 2016-10-16 16:43:03 +00:00
whitequark
7618907cad runtime: use i64 for watchdog timeout, not i32. 2016-10-16 16:32:43 +00:00
whitequark
a8c017bfcc runtime: port ksupport to Rust. 2016-10-16 16:32:43 +00:00
whitequark
fee75bd50f runtime: remove some redundant libm functions copied inline. 2016-10-16 16:25:29 +00:00
6a683c712b phaser: work around for unreliable transciever init 2016-10-16 16:01:23 +02:00
d3b274fc4d drtio: synchronizer MMCM 2016-10-16 17:40:58 +08:00
03d3a85e75 drtio: RX clock alignment and ready 2016-10-15 18:36:27 +08:00
Florent Kermarrec
0259c80015 phaser/kc705: remove transceiver initialization workaround 2016-10-14 19:06:43 +02:00
9ba6be8796 phaser: speed up ad9154_test_status 2016-10-14 13:23:14 +02:00
4968de053c phaser: update README 2016-10-14 13:21:54 +02:00
4b4fd32e3d phaser: add another sawg demo 2016-10-14 13:21:42 +02:00
d16068dd9b sawg: absolute phase updates 2016-10-14 12:42:08 +02:00
9b43f09c1d phaser: cleanup prbs 2016-10-14 11:56:10 +02:00
b41b9de905 phaser: tag jesd as clock net 2016-10-14 10:46:33 +02:00
4ea3dea217 phaser: broad spectrum antibiotics with xilinx false paths 2016-10-14 10:22:03 +02:00
e400f8d672 phaser: add two more registers before jesd 2016-10-14 09:54:56 +02:00
3c9c42c779 phaser: drive rtio from jesd-bufg 2016-10-14 02:26:19 +02:00
b9de621557 phaser: fix comment 2016-10-14 02:18:58 +02:00
2b5a69a80c phaser: rm idle_kernel 2016-10-14 02:18:15 +02:00
808874a523 phaser: drive cd_jesd with BUFG 2016-10-14 01:57:48 +02:00
342d6d756e phaser: bypass gtx phalign 2016-10-14 00:59:53 +02:00
89150c9817 phaser: 10G line rate 2016-10-14 00:53:38 +02:00
08e4aa3e3f drtio: GTX WIP 2016-10-14 00:36:13 +08:00
c548a65ec3 drtio: clock domains 2016-10-14 00:34:59 +08:00
42c6658ffe phaser: add some more blinking leds 2016-10-13 15:21:27 +02:00
6a456bd7d4 phaser: feed correct sink (crucial) 2016-10-13 15:17:38 +02:00
b1137563b3 phaser: cleanup dac_setup 2016-10-13 15:02:42 +02:00
4c7c479c94 ad9154: add mirrored bits 2016-10-13 15:02:18 +02:00
c8e45ae3f6 phaser: cleanup jesd phy instantiation a bit 2016-10-13 14:43:24 +02:00
01bfe54dde phaser: actually enable stpl 2016-10-13 14:09:29 +02:00
78a41eec8f phaser: kc705: syntax 2016-10-13 12:38:32 +02:00
Florent Kermarrec
af0e8582a2 phaser: use new jesd clocking 2016-10-13 11:51:06 +02:00
David Nadlinger
e037d167f4 language: Add "A" (ampere) as well-known unit for arguments
Signed-off-by: David Nadlinger <code@klickverbot.at>
2016-10-13 12:22:01 +08:00
81511feab8 phaser: README: specify versions 2016-10-12 17:13:06 +02:00
290498aca0 conda: misoc 0.4 (csr) 2016-10-12 16:34:19 +02:00
9c8b21b3f4 phaser: let link settle a bit longer before starting 2016-10-12 16:13:34 +02:00
9880b1ebd0 phaser: update README 2016-10-12 16:01:07 +02:00
0d1ed247e2 phaser: tweak sawg example 2016-10-12 16:01:07 +02:00
2d14864c6d Revert "phaser: 500 MHz dacclock"
This reverts commit 5f737bef76.
2016-10-12 16:01:07 +02:00
Florent Kermarrec
12b8598b84 stpl: fix byte ordering 2016-10-12 15:59:27 +02:00