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ad9154: add mirrored bits

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This commit is contained in:
Robert Jördens 2016-10-13 15:02:18 +02:00
parent c8e45ae3f6
commit 4c7c479c94
1 changed files with 20 additions and 4 deletions
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24
artiq/coredevice/ad9154_reg.py
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@ -39,22 +39,38 @@ def AD9154_SDOACTIVE_SET(x: TInt32) -> TInt32:
def AD9154_SDOACTIVE_GET(x: TInt32) -> TInt32:
return (x >> 3) & 0x1
# default: 0x00, access: R
# default: 0x00, access: R/W
@portable
def AD9154_SDOACTIVE_M_SET(x: TInt32) -> TInt32:
return (x & 0x1) << 4
@portable
def AD9154_SDOACTIVE_M_GET(x: TInt32) -> TInt32:
return (x >> 4) & 0x1
# default: 0x00, access: R
# default: 0x00, access: R/W
@portable
def AD9154_ADDRINC_M_SET(x: TInt32) -> TInt32:
return (x & 0x1) << 5
@portable
def AD9154_ADDRINC_M_GET(x: TInt32) -> TInt32:
return (x >> 5) & 0x1
# default: 0x00, access: R
# default: 0x00, access: R/W
@portable
def AD9154_LSBFIRST_M_SET(x: TInt32) -> TInt32:
return (x & 0x1) << 6
@portable
def AD9154_LSBFIRST_M_GET(x: TInt32) -> TInt32:
return (x >> 6) & 0x1
# default: 0x00, access: R
# default: 0x00, access: R/W
@portable
def AD9154_SOFTRESET_M_SET(x: TInt32) -> TInt32:
return (x & 0x1) << 7
@portable
def AD9154_SOFTRESET_M_GET(x: TInt32) -> TInt32:
return (x >> 7) & 0x1