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Commit Graph

4304 Commits

Author SHA1 Message Date
29d42f4648 artiq_flash: add kasli sysu 2018-03-02 15:49:41 +08:00
a9daaad77b kasli: add SYSU variant and device_db 2018-03-02 14:44:31 +08:00
1c57d27ae2 slave_fpga: use sayma_rtm magic 2018-03-01 18:32:19 +01:00
de63e657b8 kasli/si5324: lock to 100 MHz with highest available bandwidth 2018-03-01 14:49:53 +01:00
abd160d143 slave_fpga: check DONE before loading 2018-03-01 19:53:34 +08:00
a04a36ee36 firmware: move wait for write completion to read() 2018-03-01 11:37:33 +01:00
a6ae08d8b8 firmware/spi: work around cs_polarity semantics
The semantics differ between the RTIO and CSR interface.
2018-03-01 11:19:18 +01:00
cc70578f1f remove old spi RTIO Phy 2018-03-01 11:19:18 +01:00
ec5b81da55 kc705: switch backplane spi to spi2 2018-03-01 11:19:18 +01:00
6fbe0d8ed8 hmc830: be explicit about SPI mode selection 2018-03-01 11:19:18 +01:00
a7720d05cd firmware, sayma: port converter_spi to spi2
* ksupport/nrt_bus
* port ad9154, hmc830, hmc7043
* port local_spi and drtio_spi
* port kernel_proto libdrtioaux, satman
* change sayma_rtm gateware over
* add spi2 NRTSPIMaster
* remove spi NRTSPIMaster
* change sayma device_db
* change HMC830 to open mode and explicitly sequence open mode
2018-03-01 11:19:18 +01:00
68278e225d slave_fpga: check for INIT low 2018-03-01 17:28:01 +08:00
whitequark
14f6fa6699 firmware: fix a warning. 2018-03-01 01:25:55 +00:00
whitequark
d051cec0dd firmware: remove useless module. 2018-03-01 01:22:52 +00:00
54984f080b artiq_flash: flash RTM firmware
based on whitequark's work in f95fb27

m-labs/artiq#813
2018-02-28 19:29:01 +01:00
0c49201be7 firmware: add slave fpga serial load support
based on whitequark's work in f95fb27

m-labs/artiq#813
2018-02-28 19:27:52 +01:00
1f999c7f5f sayma_amc: expose RTM fpga load pins as GPIOs 2018-02-28 18:44:36 +01:00
cedecc3030 Revert "firmware: Sayma RTM FPGA bitstream loading prototype (#813)."
This reverts commit f95fb273f1.

Will be replaced with a bitbang/GPIO based version.
2018-02-28 18:43:56 +01:00
whitequark
f95fb273f1 firmware: Sayma RTM FPGA bitstream loading prototype (#813). 2018-02-28 16:46:23 +00:00
Florent Kermarrec
2896dc619b drtio/transceiver/gth: fix multilane 2018-02-28 14:15:40 +01:00
5046d6a529 ad9912/10: add a bit more slack to init() 2018-02-27 23:14:44 +01:00
f97163cdee examples/master: sync device_db with kc705_nist_clock 2018-02-27 19:40:00 +01:00
whitequark
916b10ca94 examples: spi → spi2. 2018-02-27 18:36:45 +00:00
386aa75aaa kasli: control SFP1 and SFP2 LEDs in DRTIO satellite to match master 2018-02-27 23:18:18 +08:00
5d81877b34 kasli: implement multi-link DRTIO on SFP1 and SFP2 of master 2018-02-27 23:15:20 +08:00
Florent Kermarrec
1f0d955ce4 drtio/transceiver/gtp: implement tx multi lane phase alignment sequence 2018-02-27 12:32:25 +01:00
e565d3fa59 kasli: add analyzer and RTIO log to DRTIO master target 2018-02-27 18:09:07 +08:00
760724c500 kasli/device_db: fix i2c switch addr 2018-02-26 11:37:12 +01:00
b466a569bf coredevice: export spi2 2018-02-24 09:49:31 +01:00
Florent Kermarrec
5b0f9cc6fd drtio/transceiver/gth: fix single transceiver case 2018-02-23 12:15:47 +01:00
cff85ee13b novogorny: simplify and fix coefficient 2018-02-23 10:09:44 +01:00
Florent Kermarrec
b4ba71c7a4 drtio/transceiver/gth: implement tx multi lane phase alignment sequence (fix merge issue...) 2018-02-23 08:37:05 +01:00
Florent Kermarrec
820c834251 drtio/transceiver/gth: implement tx multi lane phase alignment sequence 2018-02-22 22:14:15 +01:00
bc5e949bb4 novogorny: fix gain register length 2018-02-22 18:45:55 +00:00
1452cd7447 novogorny: add coredevice driver and test with Kasli
m-labs/artiq#687
2018-02-22 17:19:51 +01:00
74517107f0 ad9912: add slack after prodid read 2018-02-22 17:19:51 +01:00
3b7971d15d kasli: spelling 2018-02-22 17:19:51 +01:00
771bf87b56 kc705: port amc101_dac/spi0 and sma_spi to spi2 2018-02-22 17:19:51 +01:00
d4a10dcbd4 urukul: fix example 2018-02-22 11:28:50 +01:00
e8d4db1ccf coreanalyzer: add spi2 support
m-labs/artiq#926
2018-02-22 11:28:46 +01:00
f8e6b4f4e3 ad5360: port to spi2
* kc705 nist_clock target gateware
* coredevice driver
* moninj code
* test/example/device_db

This is untested as we don't have a AD5360 board right now.
Will be tested with Zotino v1.1

m-labs/artiq#926
2018-02-22 10:25:46 +01:00
96423882f2 fix 4d6619f3b 2018-02-22 15:27:54 +08:00
fa0d929b4d drtio: reorganize RX synchronizers 2018-02-22 15:21:23 +08:00
e5de5ef473 kasli: use deterministic RX synchronizer
Could not reproduce the "fully broken bitstream" bug.
2018-02-22 15:18:09 +08:00
4d6619f3bc satman: send ResetAck 2018-02-22 15:17:44 +08:00
a5ad1dc266 kc705: fix sdcard miso pullup 2018-02-21 19:41:05 +01:00
0d8145084d test_spi: move to new spi2 core 2018-02-21 19:41:05 +01:00
898bad5abc spi2: fixes 2018-02-21 19:41:05 +01:00
Florent Kermarrec
5eda894db4 firmware/libboard/sdram: increase read_delays dead zone to 32 on KU 2018-02-21 19:36:37 +01:00
whitequark
96f697ec96 firmware: update compiler_builtins to unbreak __gtdf2.
Fixes #883.
2018-02-21 15:21:48 +00:00