Commit Graph

1662 Commits

Author SHA1 Message Date
d20fb5abb2 remove workaround 2015-07-07 13:46:14 +02:00
f9d878119a pxi6733: add mediator 2015-07-05 19:07:57 +02:00
2bc8286f3f pdq2/mediator: fix arm 2015-07-05 19:07:31 +02:00
58c0150822 ttl: improve clockgen doc 2015-07-05 19:07:13 +02:00
2eeaa3b9be pxi6733: clean up docstring 2015-07-05 18:50:16 +02:00
19442efdae travis: binstar takes -q before command... 2015-07-04 23:19:08 -06:00
fbdc0504d8 travis: logout of binstar after upload 2015-07-04 22:52:09 -06:00
096c72242e travis: shut up conda and binstar progress bars 2015-07-04 22:48:34 -06:00
a3fe538067 test: fix get_from_ddb 2015-07-04 22:36:23 -06:00
e056438cef travis: remove gitter webhook 2015-07-04 22:09:20 -06:00
f6e8537db9 travis: add email-notification for hardware-ci 2015-07-04 22:09:04 -06:00
409c66e966 test: convert lda/tcube/409b to hardware_testbench 2015-07-04 21:44:28 -06:00
959ba99f1c pipistrello: try simpler constraints 2015-07-04 21:08:28 -06:00
6faa8ecd51 test: split full_stack into coredevice and coredevice_vs_host
also adapt it to hardware_testbench
closes: #62
2015-07-04 20:35:02 -06:00
4cbf280f1a test: return experiment not, rdb 2015-07-04 20:05:11 -06:00
00b9368a0c language/core: add EncodedException to __all_ 2015-07-04 19:51:30 -06:00
380f498284 Merge branch 'namespace_all'
* namespace_all:
  use __all__ to structure the namespace
2015-07-04 18:38:26 -06:00
65ec6c28f4 ttl/clockgen: expose acc_width 2015-07-04 19:21:25 +02:00
abd58667b9 pxi6733: small cleanup 2015-07-04 18:49:09 +02:00
504576de58 remove unneeded import 2015-07-04 18:43:07 +02:00
753d61b38f complete support for TTL clock generator 2015-07-04 18:36:01 +02:00
a615a3830a test/coredevice: minor fixes 2015-07-04 18:35:11 +02:00
Yann Sionneau
3471ef80fd manual: closes #63, tell to install xc3sprog before flashing 2015-07-04 14:48:55 +02:00
Yann Sionneau
813a2a2edf conda: add missing udev rules files in the package 2015-07-04 12:50:12 +02:00
2674ed1d2d use __all__ to structure the namespace 2015-07-02 22:02:21 -06:00
0a9f9093f7 kc705: fix ttl15 2015-07-02 20:02:05 +02:00
2881d5f00a gateware: add RTIO clock generator 2015-07-02 18:20:26 +02:00
74f07092c7 test/coredevice: fix timestamp conflict 2015-07-02 10:26:00 +02:00
984e82b82a doc: update slides with new API 2015-07-01 23:50:11 +02:00
e5e035d031 doc/manual: add fire_and_forget 2015-07-01 22:37:12 +02:00
771ad6cb26 test/coredevice: adapt to MU API 2015-07-01 22:34:49 +02:00
5ace0f8e7a Merge branch 'master' of https://github.com/m-labs/artiq 2015-07-01 22:23:10 +02:00
9d6287a6a3 expose machine units to user 2015-07-01 22:22:53 +02:00
Yann Sionneau
d7ef885d9e controllers: print+exit instead of raising exception for argparse error, better doc for --simulation
As long as you use --simulation, the driver will be in simulation mode.
Even if you specify a --device or --channels.

That can allow you to just switch to simulation mode by adding
--simulation in the device database without having to
remove the serial number or device path/name.
2015-07-01 11:54:28 +02:00
Yann Sionneau
652f3359a2 lda_controller: fix typo 2015-07-01 11:41:01 +02:00
0f06bac701 travis: use "use-local" for conda install
http://conda.pydata.org/docs/build_tutorials/pkgs.html
2015-06-29 14:18:38 -06:00
3ee2bd5fa8 pipistrello: set CLKFX_MD_MAX from MD ratio 2015-06-29 12:59:59 -06:00
d1c4cf0b78 pipistrello: update rtio channel doc 2015-06-29 12:21:54 -06:00
f0ac8cb354 pipistrello: add user_led:2 for debugging w/o adapter 2015-06-29 11:30:37 -06:00
Yann Sionneau
ffe1355b1a lda_controller: improve help message for --device argument 2015-06-29 19:24:55 +02:00
Yann Sionneau
a73776bd72 controllers: enforce the usage of either --simulation or --device 2015-06-29 19:21:32 +02:00
Yann Sionneau
515aa96819 controllers: use --simulation for simulation 2015-06-29 13:04:01 +02:00
d39382eca0 pipistrello: ext_led fifo depth 4 2015-06-28 22:06:33 -06:00
165ef20ffa pipistrello: drop rtio fifos for invisible leds
the main board leds are all under the adapter board

also tweak fifo depths a bit in a feeble attempt to circumvent a ISE hang (par
phase 4)
2015-06-28 21:24:57 -06:00
e2cb0e107f pipistrello: really do not request xtrig 2015-06-28 21:11:41 -06:00
23eee94458 pipistrello: add notes to nist_qc1 about dds_clock
* remove xtrig from the target as it is not usually connected (used for
  dds_clock) and ignore PMT2/BTN2 as C:15 is used for dds_clock.
* this also aligns the ttl channel numbers with kc705/nist_qc1 (two pmt
  inputs followed by 16 ttl outputs followed by leds)
2015-06-28 20:56:12 -06:00
5442ae312f benchmarks/*: remove
Benchmarks should be shaped as unittests and run as part of CI.
2015-06-28 20:56:12 -06:00
f7427dda39 test: make benchmarks unittest 2015-06-28 20:56:12 -06:00
593dafc118 test: hardware testbench 2015-06-28 20:55:59 -06:00
39e9e73ff3 language: allow experiments to import from artiq.language
this way the import stanza shows what is imported: just experiment language
related components

keep the imports also at top level until experiments have transitioned

the top level __init__.py should build and expose the entire namespace of artiq
related things, like hdf5 analysis tools, frontend components (like experiment
running api), deployment tools etc.
2015-06-28 20:52:41 -06:00