Robert Jördens
0a43815956
Merge pull request #832 from mntng/master
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set range for divider values
2017-09-21 08:43:43 +02:00
Thao
e94d2d3779
set range for divider values
2017-09-21 14:26:16 +08:00
Sebastien Bourdeauducq
9ccd95e10d
drtio: remove spurious signals
2017-09-19 20:48:12 +08:00
Sebastien Bourdeauducq
7249f151a5
targets/kc705_drtio_satellite: add missing shebang line
2017-09-19 20:48:12 +08:00
Sebastien Bourdeauducq
928cffb09b
firmware: export floor() in ksupport. Closes #828
2017-09-10 12:07:06 +08:00
Sebastien Bourdeauducq
629827f573
doc/slides: minor fixes
2017-09-06 19:25:38 +08:00
Sebastien Bourdeauducq
264d5fde83
runtime: fix Rust types in RTIO
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Previous code assumed all RTIO registers were u32, but this was changed
by misoc c5edcd08.
2017-09-06 19:21:39 +08:00
Sebastien Bourdeauducq
7fe5d737dd
conda: bump migen/misoc
2017-09-06 19:21:15 +08:00
Florent Kermarrec
2091c7696a
artiq/gateware/targets/sayma_amc_standalone: fix serwb_pll vco_div and serwb_phy mode
2017-09-06 09:18:12 +02:00
Sebastien Bourdeauducq
34ec37ac85
conda: bump misoc
2017-09-06 11:09:38 +08:00
Sebastien Bourdeauducq
2b2b345eb9
firmware: wait for serwb to be ready before proceeding further
2017-09-06 11:07:07 +08:00
Sebastien Bourdeauducq
33f053cff8
libboard: complete but undebugged support for HMC830/7043 programming
2017-09-06 10:46:02 +08:00
Sebastien Bourdeauducq
4baf17cebe
libboard: generate HMC7043 register write list
2017-09-05 21:46:03 +08:00
Sebastien Bourdeauducq
091bb28043
libboard: use libbuild_artiq
2017-09-05 21:13:04 +08:00
whitequark
74b7010d67
runtime: allow safely pulling logs even on TRACE log level.
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Before this commit, this resulted in a packet flood, because
sending a TRACE log message to the host caused more TRACE log
messages to be emitted.
2017-08-31 14:13:51 +00:00
whitequark
c9e2a085ec
logging, aqctl_corelog: recognize log level TRACE.
2017-08-31 13:12:22 +00:00
Sebastien Bourdeauducq
c5fe2799cf
conda: bump misoc
2017-08-31 13:44:31 +08:00
Sebastien Bourdeauducq
b609366c6f
runtime: fix Rust types in RTIO
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Previous code assumed all RTIO registers were u32, but this was changed
by misoc c5edcd08.
2017-08-31 13:42:32 +08:00
Sebastien Bourdeauducq
44edba0c65
firmware: add placeholder code for HMC830/7043 initialization
2017-08-31 13:35:47 +08:00
Sebastien Bourdeauducq
9edff2c520
remote_csr: interpret length as CSR size, not number of bus words
2017-08-31 13:34:48 +08:00
Sebastien Bourdeauducq
0a5904bbaa
firmware: support for multiple JESD DACs
2017-08-31 13:05:48 +08:00
Sebastien Bourdeauducq
a4144a07c4
sayma_amc: add converter SPI config defines
2017-08-31 13:04:38 +08:00
Sebastien Bourdeauducq
bacf8a1614
style
2017-08-31 12:52:09 +08:00
Sebastien Bourdeauducq
5a041c24f3
conda: bump misoc
2017-08-31 12:17:52 +08:00
Sebastien Bourdeauducq
d92cca9712
artiq_flash: fix target_file handling
2017-08-31 12:16:52 +08:00
Sebastien Bourdeauducq
e652221221
conda: bump migen and misoc
2017-08-31 11:50:32 +08:00
Sebastien Bourdeauducq
ad0a940e2d
sayma_rtm: hook up DAC SPI
2017-08-31 11:48:54 +08:00
Sebastien Bourdeauducq
f765dc50de
sayma_rtm: do not keep DACs in reset
2017-08-31 11:44:33 +08:00
Sebastien Bourdeauducq
a67659338d
sayma: clean up serwb comments
2017-08-31 11:42:01 +08:00
whitequark
4883eea252
libproto: simplify (NFC).
2017-08-31 02:48:59 +00:00
whitequark
20f43d5792
firmware: fix ethmac MTU value.
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1500 is the maximum payload size, not maximum frame size.
2017-08-31 00:57:35 +00:00
whitequark
737c1044a4
firmware: update smoltcp.
2017-08-31 00:45:56 +00:00
Florent Kermarrec
660f9856ec
gateware/serwb: add test for phy initialization
2017-08-30 17:59:10 +02:00
whitequark
f26e698f31
Revert "firmware: reduce ethmac maximum burst size by one."
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This reverts commit 2231b16e0a
.
Only made a difference with TRACE log level to UART, i.e. only
because UART was the bottleneck.
2017-08-30 15:22:20 +00:00
whitequark
39ecbc0d68
firmware: update smoltcp.
2017-08-30 14:35:45 +00:00
whitequark
2231b16e0a
firmware: reduce ethmac maximum burst size by one.
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Empirically, this much reduces packet loss. I'm not really sure why,
but it seems safe to do the change.
2017-08-30 14:35:25 +00:00
Florent Kermarrec
9650233007
gateware/serwb: change serdes clock domain to serwb_serdes
2017-08-30 15:44:44 +02:00
Florent Kermarrec
32ca51faee
gateware/targets/sayma_amc_standalone/rtm: use new serwb modules
2017-08-30 15:25:20 +02:00
Florent Kermarrec
41d57d64f6
gateware/serwb: SERWBPLL, SERWBPHY, SERWBCore and add checks in delay finding to verify the sampling window
2017-08-30 14:40:11 +02:00
Florent Kermarrec
9ba50098a8
gateware/test/serwb: use unittest for in test_etherbone
2017-08-29 17:31:01 +02:00
Florent Kermarrec
7d7f6be7ce
gateware/serwb: generate wishbone error if link loose ready in the middle of a transaction
2017-08-29 16:41:29 +02:00
Robert Jördens
c0eb2ad0b7
developing.rst: stress artiq-dev setup
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closes #814
2017-08-29 16:22:57 +02:00
Robert Jördens
43d551f1d8
README_PHASER: integrate into board port docs
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* rewrite setup commands for usage of artiq-dev metapackage
* integrate with rest of installation documentation
* move contents of README_PHASER to core_device.rst
* closes #815
2017-08-29 16:15:51 +02:00
Robert Jördens
7951e8f58a
README.rst: add licensing manifesto
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closes #825
2017-08-29 16:00:58 +02:00
Robert Jördens
f76f08ffd4
LICENSE.GPL-3: add (referenced in LGPL)
2017-08-29 16:00:38 +02:00
Florent Kermarrec
60ad36e7d6
gateware/serwb: generate wishbone error on wishbone slave when access while link is not ready
2017-08-29 13:43:26 +02:00
Florent Kermarrec
89558e2653
gateware/serwb: for the initial version set delay in the center of the valid sampling window and don't use phase detectors
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we'll use phase detectors later when it will be working reliably for both artix7 and kintex ultrascale
2017-08-29 13:38:52 +02:00
mntng
d19e70595a
test_rpctool: always create new asyncio event loop
2017-08-29 04:00:09 -04:00
mntng
3952954c12
add unitttest for artiq_rpctool
2017-08-28 10:39:32 -04:00
Sebastien Bourdeauducq
26a11a296c
sayma_rtm: drive DAC control signals
2017-08-26 16:57:02 -07:00