-
c3a87290ce
5432: spellcheck, style
master
architeuthis
2024-11-17 20:27:46 +0100
-
49c06af717
4410-4412: replace dead link
architeuthis
2024-11-14 18:58:22 +0100
-
bebd7bbfda
4456: spellcheck, style
architeuthis
2024-11-14 17:58:43 +0100
-
a68d5f50d0
4410-4412: spellcheck, style
architeuthis
2024-11-14 17:58:32 +0100
-
480e8b2966
preamble: codesection add heading
architeuthis
2024-11-14 17:29:41 +0100
-
b9b103b38e
2118-2128, 2245: fixes
architeuthis
2024-11-10 12:29:07 +0100
-
a0a1f4056e
2245: spellcheck, style
architeuthidae
2024-11-07 17:25:22 +0100
-
b3358e9b93
2238: spellcheck, style
architeuthidae
2024-11-07 17:25:08 +0100
-
5acedc8f40
2118-2128: spellcheck, style
architeuthidae
2024-11-07 16:03:29 +0100
-
48a0774a46
preamble: macro for code sections
architeuthidae
2024-11-07 16:01:52 +0100
-
4bc2d4ee6d
5568: spellcheck, style
architeuthis
2024-11-14 22:08:27 +0100
-
0a802d29d8
5518-5528: spellcheck, style
architeuthis
2024-11-14 22:08:19 +0100
-
da10356a0f
4410-4412: replace dead link
architeuthis
2024-11-14 18:58:22 +0100
-
62f9f95446
4456: spellcheck, style
architeuthis
2024-11-14 17:58:43 +0100
-
0638a0b8c9
4410-4412: spellcheck, style
architeuthis
2024-11-14 17:58:32 +0100
-
-
03e90cab6b
preamble: codesection add heading
architeuthis
2024-11-14 17:29:41 +0100
-
e2f24a058c
2118-2128, 2245: fixes
architeuthis
2024-11-10 12:29:07 +0100
-
ddf703bf6a
2245: spellcheck, style
architeuthidae
2024-11-07 17:25:22 +0100
-
6f0250f52f
2238: spellcheck, style
architeuthidae
2024-11-07 17:25:08 +0100
-
ccfceb4948
2118-2128: spellcheck, style
architeuthidae
2024-11-07 16:03:29 +0100
-
d7ae6b5e04
preamble: macro for code sections
architeuthidae
2024-11-07 16:01:52 +0100
-
-
173055138a
Standard sections as macros
architeuthidae
2024-10-30 21:29:39 +0100
-
a6985892cf
1124: fix typo
Sébastien Bourdeauducq
2024-10-30 16:18:31 +0800
-
8fa327770f
1124: standardize section capitalization
architeuthidae
2024-10-27 19:26:06 +0100
-
d5d71da272
1124: update fixes
architeuthidae
2024-10-27 12:50:20 +0100
-
12e369c395
1124 Carrier Kasli 2.0 update
architeuthidae
2024-10-22 21:38:45 +0200
-
be2ac83e71
7210: update, add phase noise chart
architeuthidae
2024-10-28 22:05:47 +0100
-
6b45ec9d28
Add README.md
architeuthidae
2024-10-27 14:50:40 +0100
-
33efbaa3cf
shell.nix -> flake.nix
architeuthidae
2024-10-27 14:38:57 +0100
-
a7ce1604ee
Add makefile and .gitignore
architeuthidae
2024-10-27 14:29:31 +0100
-
979f27ac4d
7210: update, add phase noise chart
architeuthidae
2024-10-28 22:05:47 +0100
-
7cbf52e96b
Add README.md
architeuthidae
2024-10-27 14:50:40 +0100
-
d55c1b68bf
shell.nix -> flake.nix
architeuthidae
2024-10-27 14:38:57 +0100
-
26d25ead52
1124: standardize section capitalization
architeuthidae
2024-10-27 19:26:06 +0100
-
2b829885ac
Add makefile and .gitignore
architeuthidae
2024-10-27 14:29:31 +0100
-
-
113cdf2fa4
1124: update fixes
architeuthidae
2024-10-27 12:50:20 +0100
-
8312ff762e
Fix some compilation warnings
architeuthidae
2024-10-27 12:36:05 +0100
-
-
dd6fe2d657
1124 Carrier Kasli 2.0 update
architeuthidae
2024-10-22 21:38:45 +0200
-
-
c9b68e38b6
Add datasheet template.tex
architeuthidae
2024-10-22 21:56:13 +0200
-
ed02c0abe2
2218-2128: fix image imports
architeuthidae
2024-10-23 15:50:49 +0200
-
b7a9d08233
Standardize labels to preamble
architeuthidae
2024-10-23 15:50:25 +0200
-
d7003c4cd7
Add datasheet template.tex
architeuthidae
2024-10-22 21:56:13 +0200
-
c32b128d6f
Unify preamble.tex, footnote.tex
architeuthidae
2024-10-22 20:34:00 +0200
-
a9674e90df
Refactor images
architeuthidae
2024-10-22 20:33:11 +0200
-
-
3480a1a6d0
4410: fix SUServo DIP switch configuration
mwojcik
2024-08-06 18:53:07 +0800
-
f3858552b6
2245: remove absolute maximum specs
occheung
2022-09-05 11:55:31 +0800
-
ebc1235847
1124: add insn for clock configuation setup
occheung
2022-08-11 10:48:50 +0800
-
4b9822c07e
1124: init
occheung
2022-08-09 17:31:27 +0800
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d387006656
2118-2128: (max. -> min.) sustained event separation
occheung
2022-07-27 15:17:32 +0800
-
69696899ac
2118-2128: tabulate MSES
occheung
2022-07-27 15:16:09 +0800
-
8ce5cca85e
2118-2128: update code line range
occheung
2022-07-27 15:15:26 +0800
-
d6d29c89a1
ttl_in/MTD: fix time.sleep duration
occheung
2022-07-27 15:14:42 +0800
-
a7dfa03a21
ttl_in/MTD: import time
occheung
2022-07-27 15:14:12 +0800
-
440b3ef3df
2118-2128: add t_min info from #26
occheung
2022-07-26 18:26:52 +0800
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7d993a4800
2238: remove min input edge rate
occheung
2022-07-26 13:11:15 +0800
-
77d31568b1
5108: specify noise in RMS
occheung
2022-07-26 13:10:01 +0800
-
df564d2375
5108: remove gain condition for terminated voltage spec
occheung
2022-07-25 17:29:26 +0800
-
b8e89f4d01
4410/linearity: expected -> ideal
occheung
2022-07-25 17:01:03 +0800
-
8138e793d7
7210: cite waveform plot
occheung
2022-07-25 16:33:42 +0800
-
a14aa89a76
7210: fix specs
occheung
2022-07-25 16:25:26 +0800
-
5d8dc38db7
7210: clarify on clock in/out format
occheung
2022-07-25 14:56:20 +0800
-
688f5fdf23
7210: add phaser clock input to application
occheung
2022-07-25 14:30:33 +0800
-
3a6ed63f0a
2118-2128: add RTIO constraint
occheung
2022-07-22 17:46:35 +0800
-
2573d94ce9
update shell.nix
nix_fix
topquark12
2022-07-08 16:38:57 +0800
-
-
c1388a53a8
4410: remove dead titles
occheung
2022-06-24 11:31:39 +0800
-
af0fca61e2
4410: replot voltage measured vs expected
occheung
2022-06-24 11:29:40 +0800
-
6d9faa7bb9
4410: add asf vs v_rms
occheung
2022-06-23 16:58:16 +0800
-
42cbd9e195
7210: init
occheung
2022-06-22 14:53:28 +0800
-
2838213457
fix language
occheung
2022-06-17 16:12:27 +0800
-
2d0a866274
2238: add spec on max voltage with term
occheung
2022-06-17 16:07:17 +0800
-
2964e13102
2118-2128: separate term rating to another spec
occheung
2022-06-17 16:06:26 +0800
-
1cf6919ec8
add missing plot in
b476c178
occheung
2022-06-17 13:34:56 +0800
-
5c44a65d33
5568: init
occheung
2022-06-16 16:01:35 +0800
-
c1c078671b
examples: move SPI examples to spi.py
occheung
2022-06-16 16:00:22 +0800
-
9920661516
2245: add dio_spi examples
occheung
2022-06-13 17:27:32 +0800
-
8ff606888c
2118-2128: add BNC-TTL front panels
occheung
2022-06-09 16:54:00 +0800
-
8c2c9ecfe4
5108: mention possible SMA breakout option
occheung
2022-06-09 11:51:25 +0800
-
11ee1ebcbd
5518-5528: init
occheung
2022-06-08 17:22:55 +0800
-
b86eea7611
4410-4412: remove mention of external sync signal distribution
occheung
2022-06-08 17:21:27 +0800
-
ac639b9d1e
2118-2128: add TTLClockGen example
occheung
2022-06-07 16:01:18 +0800
-
9bd1412d9c
2118-2128: Add comment to make coarse RTIO cycle clear
occheung
2022-06-07 14:36:21 +0800
-
2a5066ac5f
2118-2128: add <8ns short pulse example
occheung
2022-06-07 13:49:14 +0800
-
f5ce9e19e9
4410-4412: add eem mode docs
occheung
2022-06-07 12:46:23 +0800
-
fa0de2a72d
5108: add 'ADC' to title
occheung
2022-02-14 17:36:05 +0800
-
2a9d7f4f9c
4456: clarify setup for the tests
occheung
2022-02-14 11:02:07 +0800
-
75f3a328db
4456: dds -> pll
occheung
2022-02-14 10:38:28 +0800
-
b476c178d0
2118-2128: add min pulse width spec
occheung
2022-02-08 13:33:53 +0800
-
3ed6a7ccbe
2118-2128: fix data rate spec
occheung
2022-02-07 14:41:06 +0800
-
d622423675
4456: remove mention to cpld cfg on rf_sw
occheung
2022-02-07 14:28:03 +0800
-
2ca8632582
4456: update attenuator API
occheung
2022-02-07 14:26:58 +0800
-
6199e4bb5e
4456: fix quotation mark
occheung
2022-02-04 17:23:05 +0800
-
1d7e6dc853
4456: init
occheung
2022-02-04 17:18:09 +0800
-
d4387cae18
5108: fix
d157dda
occheung
2022-02-04 14:59:26 +0800
-
1b8beee45d
2118-2128: add max data rate spec
occheung
2022-02-04 14:38:36 +0800
-
7bdc121b6a
2118-2128: add low input min voltage
occheung
2022-02-04 14:01:55 +0800
-
0b4ad6762e
2118-2128: add high input max voltage
occheung
2022-02-04 13:59:13 +0800
-
8864ecaf87
5432: fix card name
occheung
2022-02-04 13:49:06 +0800
-
656068e151
4410-4412: fix card name
occheung
2022-02-04 13:45:25 +0800
-
47e0c31705
ttl: update direction switches desc
occheung
2022-02-04 13:30:29 +0800
-
d157dda863
5108: update applications
occheung
2022-02-04 13:10:28 +0800