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5108: mention possible SMA breakout option 

Updates #13
nix_fix
occheung 2022-06-09 11:51:25 +08:00
parent 11ee1ebcbd
commit 8c2c9ecfe4
1 changed files with 16 additions and 1 deletions
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17
5108.tex
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@ -37,6 +37,7 @@
\item{1.5 MSPS simultaneously on all channels.}
\item{Full scale input voltage $\pm$10mV to $\pm$10V.}
\item{BNC connector.}
\item{SMA breakout with 5528 SMA-IDC adapter.}
\end{itemize}
\section{Applications}
@ -55,6 +56,7 @@ It adds analog-digital converting capabilities to carrier cards such as 1124 Kas
It provides 8 analog-to-digital channels, each exposed by a BNC connector.
Each channel supports input voltage ranges from \textpm 10mV to \textpm 10V.
All channels can be sampled simultaneously.
Channels can broken out to SMA by adding a 5528 SMA-IDC card.
5108 ADC Sampler provides a sample rate of 1.5 MSPS.
However, the sample rate in practice is typically limited by the use of ARTIQ-Python kernel code.
@ -163,6 +165,9 @@ However, the sample rate in practice is typically limited by the use of ARTIQ-Py
\draw (1.25,0)to[short,o-](1.6,0) ;
\end{scope}
% Dwar IDC Port (ADC IN)
\draw (0.8, -1.925) node[twoportshape,t={IDC Port}, circuitikz/bipoles/twoport/width=1.5, scale=0.5] (idc) {};
% Draw PGIAs
% The connections are too complicated for the usual buffer/op-amp symbol
\draw (3, 2.45) node[twoportshape,t=\MymyLabel{CH 0}{PGIA}, circuitikz/bipoles/twoport/width=1.2, scale=0.5] (pgia0) {};
@ -174,7 +179,7 @@ However, the sample rate in practice is typically limited by the use of ARTIQ-Py
\draw (3, -1.75) node[twoportshape,t=\MymyLabel{CH 6}{PGIA}, circuitikz/bipoles/twoport/width=1.2, scale=0.5] (pgia6) {};
\draw (3, -2.45) node[twoportshape,t=\MymyLabel{CH 7}{PGIA}, circuitikz/bipoles/twoport/width=1.2, scale=0.5] (pgia7) {};
% Drop termination connection to input lines
% Draw termination connection to input lines
\draw [-] (0.65, 1.675) -- (0.65, 1.225);
\draw [-] (0.75, 1.675) -- (0.75, 0.875);
\draw [-] (0.85, 1.675) -- (0.85, 0.525);
@ -184,6 +189,16 @@ However, the sample rate in practice is typically limited by the use of ARTIQ-Py
\draw [-] (1.25, 1.675) -- (1.25, -0.875);
\draw [-] (1.35, 1.675) -- (1.35, -1.225);
% Draw IDC port (ADC IN) connection to input lines
\draw [-] (0.45, -1.675) -- (0.45, 1.225);
\draw [-] (0.55, -1.675) -- (0.55, 0.875);
\draw [-] (0.65, -1.675) -- (0.65, 0.525);
\draw [-] (0.75, -1.675) -- (0.75, 0.175);
\draw [-] (0.85, -1.675) -- (0.85, -0.175);
\draw [-] (0.95, -1.675) -- (0.95, -0.525);
\draw [-] (1.05, -1.675) -- (1.05, -0.875);
\draw [-] (1.15, -1.675) -- (1.15, -1.225);
% Connect BNC to PGIA, with termination line
\draw [-latexslim] (bnc0.east) -- (1.9, 1.225) -- (1.9, 2.45) -- (pgia0.west);
\draw [-latexslim] (bnc1.east) -- (2, 0.875) -- (2, 1.75) -- (pgia1.west);