48eb5a5ae3
5432: relocate examples source
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Updates #24 .
2022-01-20 17:17:13 +08:00
708330a57a
suservo.py: remove unnecessary import
2022-01-20 17:00:54 +08:00
ac8d398f5e
suservo: refrain from generating channel list
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For consistency with other DDS examples that uses multiple channels.
e.g. TTL relay external trigger, DDS synchronization
2022-01-20 16:48:58 +08:00
8404fed3da
4410-4412: get example code from file
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Updates #24 . Added example files for DDS and SUServo respectively.
2022-01-20 16:43:45 +08:00
9f6056f615
ttl: remove extra rtio break in example
2022-01-20 14:58:40 +08:00
9488a03aa4
ttl: factor out examples
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Also, the ttl timestamp_mu method has a parameter.
2022-01-20 14:51:51 +08:00
611a0009af
bump version
2022-01-19 15:34:54 +08:00
73714d0028
4410-4412: remove symbol column except for test characteristics
2022-01-19 12:39:24 +08:00
ce563bdcf1
4410-4412: remove fractions & literal word symbols
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Some of them are added in 05eba6fa
2022-01-19 12:29:42 +08:00
7841162bd6
5432: remove symbols
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revert b9ce64ed
2022-01-19 12:27:39 +08:00
b9ce64edfb
5432: add symbols
2022-01-19 10:20:57 +08:00
972ed69593
4410-4412: fix case
2022-01-19 10:19:58 +08:00
2613df692b
4410-4412: fix dds signal spec citation
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* cite wiki instead of datasheets for frequency range, as the rest of the signal chain has low response for low frequency
* cite wiki instead of ad9912 datasheet for frequency resolution, see the ad9912 design bug on wiki
2022-01-18 17:05:31 +08:00
022563a056
5432: uncite IC for output voltage spec
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There are other elements on the output signal chain, like the unity op-amp folowing the DAC.
2022-01-18 16:03:42 +08:00
b08b9dc069
5432: stress 32-CH DAC on diagram
2022-01-18 16:03:07 +08:00
00fd2df2e8
features: x-channel DDS/DAC
2022-01-18 16:02:01 +08:00
14776cf74d
5432: revert url footnote
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Auto-recognizing footnote as url is really a browser feature.
Chromium will not be able to parse the underscore in Zotino DAC IC datasheet URL.
2022-01-18 15:07:26 +08:00
0b6c4e2b77
add the reset of the citation
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follow up of 56082b94#25 , #29
2022-01-18 12:10:16 +08:00
947b3672b9
4410-4412: attenuation -> digital attenuation
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Just to not be confused with other source of attenuation/amplifications
2022-01-18 09:57:42 +08:00
b0cf38c036
4410-4412: fix output frequency symbol
2022-01-18 09:54:05 +08:00
aa36ebe907
2245: fix typo
2022-01-17 16:02:52 +08:00
56082b94c3
2118-2128: add footnote for data source
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Updates #29 .
2022-01-17 14:44:13 +08:00
edde5dada4
5432: fix IDC connectors labelling
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Closes #32
2022-01-17 11:40:01 +08:00
591f0776f2
5432: mention breakout cards
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Updates #31 .
2022-01-17 11:37:14 +08:00
cb911797c8
5432: make thermistor arrow uni-directional
2022-01-14 17:48:24 +08:00
732270ef56
5432: simplify arrow to thermistor
2022-01-14 17:47:19 +08:00
ac92fb3c96
5432: highlight thermal connection
2022-01-14 17:41:57 +08:00
963be861c9
5432: make TEC side more detailed
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Update #23 .
2022-01-14 17:28:25 +08:00
fa98eb2779
2238: remove transceiver counter
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To avoid readers' confusion.
2022-01-14 16:15:18 +08:00
11927f6dcd
2245: remove propagation delay comment
2022-01-14 16:13:59 +08:00
7ecc88de89
5432: add description to step response plots
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Closes #28 .
2022-01-14 15:53:25 +08:00
db090c8807
5432: add setup for FEXT plot
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Updates #28 .
2022-01-14 15:29:35 +08:00
4ef628b708
dio: rename transceivers on the IO side
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Naming all transceivers on the IO side as "IO Bus Transceiver(s)".
Just to differentiate it from LVDS transceivers.
Closes #21 .
2022-01-14 14:41:14 +08:00
b0851a479e
5432: add TEC
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Closes #23 .
2022-01-14 14:33:56 +08:00
3654502d1b
dio: add spec sources
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Also remove propagation delay specs from LVDS-TTL.
PCB traces would make a significant impact.
2022-01-14 14:09:32 +08:00
7230cdbec1
2118-2128: clarify connector type
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Just to clarify, no self converting mechanical magic here.
Closes #27 .
2022-01-14 13:05:21 +08:00
cd7d118f7c
update disclaimers
2022-01-14 11:55:48 +08:00
b0551b94a0
ttl: reduce image size for switches
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Make the same edits on the original photos, then compress with jpegoptim.
Should look better as well.
2022-01-11 17:18:30 +08:00
6b24b54f60
ttl: add switch desc section
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Closes #20 .
Closes #22 .
2022-01-11 16:56:38 +08:00
439edc4302
4410-4412: fix caption punctuation again
2022-01-11 14:54:26 +08:00
e4ceb32134
4410: confirm that dds amplitude at net positive input
2022-01-10 16:15:10 +08:00
ca6caa8e1d
4410: leave space at the top of suservo graph
2022-01-10 16:06:56 +08:00
d9ac9d3d18
4410-4412: add DIP switch doc
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plus minor reformatting
2022-01-10 15:20:21 +08:00
876291025b
4410: fix front panel caption
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Inconsistent punctuation
2022-01-10 15:18:33 +08:00
282b7bf244
move drawings in front of ARTIQ examples
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And some additional reformatting.
2022-01-07 17:25:34 +08:00
3c21ccd4a0
4410: update su-servo example
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The example works after gateware fix in ARTIQ.
9d493028e5Closes #2 .
2022-01-07 16:54:36 +08:00
05eba6faef
4410-4412: add symbols in spec table
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There are very limited usage/mentions of symbols on RF power specs (harmonics, attenuations, etc).
2022-01-07 16:16:08 +08:00
ae4015fbd7
2238: simplify diagram
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Merging a transiceiver on the baseboard and another transceiver on the mezzanine into 2x transceivers.
So the EEM line does not split into odd/even transceivers, and no more jumping lines/hyper-abstract connections.
The termination switches still repsect the physical configuration, so it is not the cleanest.
Though. the connections should be easily understood.
2022-01-07 13:57:22 +08:00
39b10ecbd2
slightly enlarge FP drawings
2022-01-07 10:37:16 +08:00
1727c73e9a
5432: add front panel
2022-01-07 10:33:14 +08:00
