 Jack-Zheng
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112e812159
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see update log for details
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2021-08-31 17:36:44 +08:00 |
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Jack-Zheng
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22cd0f4c9d
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PCB: fix logo resolution issue, fix AG5300 module pin bug, update crystal package, add SMT positioning hole; FabricationOutput: add SMT position and BOM file
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2021-07-14 14:33:32 +08:00 |
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Jack-Zheng
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9aeb94f2c9
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PCB: add screw hole keep out
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2021-07-12 11:29:03 +08:00 |
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Jack-Zheng
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191eacdf8c
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HSADC: change from AC coupling to DC coupling; PCB: finish HSADC layout; LVDS&IO: fix name issue
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2021-07-09 14:36:13 +08:00 |
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Jack-Zheng
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3228e16c8f
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MCU, FPGA, Ethernet, PCB: fix decoupling capacitors
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2021-07-07 16:14:10 +08:00 |
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Jack-Zheng
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eceba52792
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PCB & FPGA & MCU: fix LVDS impedance issues
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2021-07-06 10:28:18 +08:00 |
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Jack-Zheng
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0e1120d266
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FPGA: modify pin connections for convenient layout routing; PCB: finish FPGA IO, FSMC, ADC BUS, Power routing
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2021-06-25 16:57:46 +08:00 |
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Jack-Zheng
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2a31c8b3f3
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PCB: finish LVDS routing
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2021-06-24 15:43:31 +08:00 |
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Jack-Zheng
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6535ff5423
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LVDS&IO: add fpga flash config; all: fix connection bugs; PCB: initialize component positions and layout
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2021-06-22 16:34:02 +08:00 |
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Jack-Zheng
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9bcc9a229b
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TestAutomation: replace messy wires with bus
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2021-06-21 12:10:31 +08:00 |
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Jack-Zheng
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fc2cb47610
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all: map symbol and footpins
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2021-06-16 17:32:33 +08:00 |
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Jack-Zheng
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da19dad9cd
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init project
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2021-06-16 17:31:36 +08:00 |