PCB: add screw hole keep out
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e0ef7d6e7f
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FPGA.sch
4
FPGA.sch
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@ -3370,10 +3370,10 @@ Wire Wire Line
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Connection ~ 6850 9700
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Connection ~ 6850 10100
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$Comp
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L power:+3V3 #PWR?
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L power:+3V3 #PWR0165
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U 1 1 60FE7B32
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P 4200 7350
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F 0 "#PWR?" H 4200 7200 50 0001 C CNN
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F 0 "#PWR0165" H 4200 7200 50 0001 C CNN
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F 1 "+3V3" H 4215 7523 50 0000 C CNN
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F 2 "" H 4200 7350 50 0001 C CNN
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F 3 "" H 4200 7350 50 0001 C CNN
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@ -157,7 +157,7 @@ L Device:Q_NMOS_GSD Q3
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U 1 1 61008FD4
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P 3950 3200
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F 0 "Q3" H 4155 3246 50 0000 L CNN
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F 1 "FDN86246" H 4155 3155 50 0000 L CNN
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F 1 "FDN86246" H 3850 3400 50 0000 L CNN
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F 2 "Package_TO_SOT_SMD:SuperSOT-3" H 4150 3300 50 0001 C CNN
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F 3 "~" H 3950 3200 50 0001 C CNN
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1 3950 3200
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,12 @@
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(module ScrewKeepout (layer F.Cu) (tedit 60EBA4E8)
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(fp_text reference M3 (at 0 0.5) (layer F.SilkS) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value ScrewKeepout (at 0 -0.5) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_circle (center 0 0) (end 3 0) (layer B.SilkS) (width 0.12))
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(fp_circle (center 0 0) (end 3 0) (layer F.Cu) (width 0.12))
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(fp_circle (center 0 0) (end 3 0) (layer F.SilkS) (width 0.12))
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(fp_circle (center 0 0) (end 3 0) (layer B.Cu) (width 0.12))
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)
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@ -0,0 +1,8 @@
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(module ScrewPad (layer F.Cu) (tedit 60EBA5DD)
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(fp_text reference REF** (at 0 0.5) (layer F.SilkS) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value ScrewPad (at 0 -0.5) (layer F.Fab) hide
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(effects (font (size 1 1) (thickness 0.15)))
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)
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)
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@ -1,4 +1,4 @@
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update=Fri Jul 9 13:24:20 2021
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update=Mon Jul 12 10:12:36 2021
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version=1
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last_client=kicad
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[general]
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@ -54,8 +54,8 @@ ViaDiameter3=0.5
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ViaDrill3=0.3
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ViaDiameter4=0.8
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ViaDrill4=0.5
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ViaDiameter5=4.2
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ViaDrill5=4
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ViaDiameter5=6
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ViaDrill5=3
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dPairWidth1=0.127
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dPairGap1=0.1016
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dPairViaGap1=0.25
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@ -83,7 +83,7 @@ OthersTextSizeThickness=0.15
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OthersTextItalic=0
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OthersTextUpright=1
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SolderMaskClearance=0
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SolderMaskMinWidth=0.00254
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SolderMaskMinWidth=0
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SolderPasteClearance=0
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SolderPasteRatio=-0
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[pcbnew/Layer.F.Cu]
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