HSADC: change from AC coupling to DC coupling; PCB: finish HSADC layout; LVDS&IO: fix name issue

This commit is contained in:
Jack-Zheng 2021-07-09 14:35:41 +08:00
parent f9574a2098
commit 191eacdf8c
8 changed files with 11372 additions and 11104 deletions

View File

@ -14,129 +14,6 @@ Comment3 ""
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View File

@ -31,8 +31,6 @@ Text HLabel 9300 3750 2 50 Input ~ 0
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1 2650 5000
1 0 0 -1
$EndComp
Wire Wire Line
5450 4350 5450 5000
Connection ~ 5450 4350
Wire Wire Line
5850 5000 5450 5000
Connection ~ 5450 5000
@ -489,52 +409,167 @@ Wire Wire Line
5150 4250 6250 4250
Wire Wire Line
5150 4800 5150 5000
$Comp
L power:GND #PWR0147
U 1 1 6106FA09
P 4050 2900
F 0 "#PWR0147" H 4050 2650 50 0001 C CNN
F 1 "GND" H 4055 2727 50 0000 C CNN
F 2 "" H 4050 2900 50 0001 C CNN
F 3 "" H 4050 2900 50 0001 C CNN
1 4050 2900
1 0 0 -1
$EndComp
Text GLabel 2950 3750 0 50 Input ~ 0
Text GLabel 1900 3750 0 50 Input ~ 0
HSADC_IN
$Comp
L Device:R R137
U 1 1 6296B398
P 3100 3550
F 0 "R137" H 3170 3596 50 0000 L CNN
F 1 "49.9/1%" H 3170 3505 50 0000 L CNN
F 2 "Resistor_SMD:R_0402_1005Metric" V 3030 3550 50 0001 C CNN
F 3 "~" H 3100 3550 50 0001 C CNN
1 3100 3550
1 0 0 -1
P 2050 4150
F 0 "R137" H 2120 4196 50 0000 L CNN
F 1 "49.9/1%" H 2120 4105 50 0000 L CNN
F 2 "Resistor_SMD:R_0402_1005Metric" V 1980 4150 50 0001 C CNN
F 3 "~" H 2050 4150 50 0001 C CNN
1 2050 4150
1 0 0 1
$EndComp
Wire Wire Line
2950 3750 3100 3750
$Comp
L power:GND #PWR0154
U 1 1 6298ABAE
P 3100 3250
F 0 "#PWR0154" H 3100 3000 50 0001 C CNN
F 1 "GND" H 3105 3077 50 0000 C CNN
F 2 "" H 3100 3250 50 0001 C CNN
F 3 "" H 3100 3250 50 0001 C CNN
1 3100 3250
-1 0 0 1
P 2050 4700
F 0 "#PWR0154" H 2050 4450 50 0001 C CNN
F 1 "GND" H 2055 4527 50 0000 C CNN
F 2 "" H 2050 4700 50 0001 C CNN
F 3 "" H 2050 4700 50 0001 C CNN
1 2050 4700
-1 0 0 -1
$EndComp
Wire Wire Line
3100 3250 3100 3400
Wire Wire Line
3100 3700 3100 3750
Connection ~ 3100 3750
Wire Wire Line
3100 3750 3500 3750
Wire Wire Line
3300 4850 4050 4850
Wire Wire Line
3950 4250 5150 4250
Wire Wire Line
1900 3750 2050 3750
Wire Wire Line
2050 4000 2050 3750
$Comp
L Device:R R1
U 1 1 614DAD32
P 3650 3750
F 0 "R1" H 3720 3796 50 0000 L CNN
F 1 "560/1%" H 3720 3705 50 0000 L CNN
F 2 "Resistor_SMD:R_0402_1005Metric" V 3580 3750 50 0001 C CNN
F 3 "~" H 3650 3750 50 0001 C CNN
1 3650 3750
0 -1 -1 0
$EndComp
Wire Wire Line
3500 3750 2050 3750
$Comp
L Device:R R5
U 1 1 60FC2B9E
P 3050 4350
F 0 "R5" V 2843 4350 50 0000 C CNN
F 1 "301/1%" V 2934 4350 50 0000 C CNN
F 2 "Resistor_SMD:R_0402_1005Metric" V 2980 4350 50 0001 C CNN
F 3 "~" H 3050 4350 50 0001 C CNN
1 3050 4350
0 1 1 0
$EndComp
$Comp
L Amplifier_Operational:LMH6611 U18
U 1 1 6286F181
P 4350 3850
F 0 "U18" H 4500 3900 50 0000 L CNN
F 1 "LMH6611" H 4450 4000 50 0000 L CNN
F 2 "Package_TO_SOT_SMD:TSOT-23-6" H 4450 3600 50 0001 L CNN
F 3 "http://www.ti.com/lit/ds/symlink/lmh6612.pdf" H 4500 4000 50 0001 C CNN
1 4350 3850
1 0 0 1
$EndComp
$Comp
L power:GND #PWR0147
U 1 1 6106FA09
P 4150 3550
F 0 "#PWR0147" H 4150 3300 50 0001 C CNN
F 1 "GND" H 4155 3377 50 0000 C CNN
F 2 "" H 4150 3550 50 0001 C CNN
F 3 "" H 4150 3550 50 0001 C CNN
1 4150 3550
0 1 1 0
$EndComp
Text Label 4350 4150 0 50 ~ 0
+5VA
Wire Wire Line
4350 4150 4250 4150
Wire Wire Line
4250 3550 4150 3550
Text Label 4450 3550 0 50 ~ 0
+5VA
Wire Wire Line
4450 3550 4350 3550
Wire Wire Line
3750 4050 4050 4050
Wire Wire Line
4050 4050 4050 4150
Wire Wire Line
4050 4150 4250 4150
Connection ~ 4250 4150
$Comp
L power:GND #PWR0164
U 1 1 628CC72D
P 4250 4950
F 0 "#PWR0164" H 4250 4700 50 0001 C CNN
F 1 "GND" V 4255 4822 50 0000 R CNN
F 2 "" H 4250 4950 50 0001 C CNN
F 3 "" H 4250 4950 50 0001 C CNN
1 4250 4950
1 0 0 -1
$EndComp
Wire Wire Line
2050 4300 2050 4700
Connection ~ 2050 3750
$Comp
L Device:C C93
U 1 1 628EF120
P 4250 4550
F 0 "C93" H 4365 4596 50 0000 L CNN
F 1 "0.1uF" H 4365 4505 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 4288 4400 50 0001 C CNN
F 3 "~" H 4250 4550 50 0001 C CNN
1 4250 4550
1 0 0 -1
$EndComp
Wire Wire Line
4250 4400 4250 4150
$Comp
L Amplifier_Operational:LMV321 U1
U 1 1 628C361F
P 3650 4350
F 0 "U1" H 3750 4600 50 0000 C CNN
F 1 "LMV321" H 3750 4500 50 0000 C CNN
F 2 "Package_TO_SOT_SMD:SOT-23-5" H 3650 4350 50 0001 L CNN
F 3 "http://www.ti.com/lit/ds/symlink/lmv324.pdf" H 3650 4350 50 0001 C CNN
1 3650 4350
-1 0 0 -1
$EndComp
Wire Wire Line
3750 4650 3750 4750
Wire Wire Line
3750 4750 4250 4750
Wire Wire Line
4250 4750 4250 4700
Wire Wire Line
5450 4350 5450 5000
Connection ~ 5450 3850
Wire Wire Line
5300 3850 5450 3850
Wire Wire Line
5450 3850 6250 3850
$Comp
L Device:C C3
U 1 1 614D04E3
P 5450 4000
F 0 "C3" H 5565 4046 50 0000 L CNN
F 1 "47pF" H 5565 3955 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 5488 3850 50 0001 C CNN
F 3 "~" H 5450 4000 50 0001 C CNN
1 5450 4000
1 0 0 -1
$EndComp
Connection ~ 5450 4350
Wire Wire Line
5450 4150 5450 4350
Wire Wire Line
4250 4950 4250 4750
Connection ~ 4250 4750
$EndSCHEMATC

View File

@ -864,7 +864,7 @@ L Device:R R95
U 1 1 60E752D9
P 4350 5400
F 0 "R95" H 4420 5446 50 0000 L CNN
F 1 "75k" H 4420 5355 50 0000 L CNN
F 1 "68k" H 4420 5355 50 0000 L CNN
F 2 "Resistor_SMD:R_0402_1005Metric" V 4280 5400 50 0001 C CNN
F 3 "~" H 4350 5400 50 0001 C CNN
1 4350 5400
@ -1279,18 +1279,6 @@ Wire Wire Line
2750 6600 2800 6600
Text GLabel 2800 6600 2 50 Input ~ 0
+3V3MP
Text Label 6450 5000 0 50 ~ 0
+6V5
Text Label 7250 5100 2 50 ~ 0
+6V5
Text Label 9900 5100 0 50 ~ 0
+6V5
Text Label 1200 6400 2 50 ~ 0
+6V5
Text Label 5450 6450 2 50 ~ 0
+6V5
Text Label 3600 6600 2 50 ~ 0
+6V5
$Comp
L Device:LED D6
U 1 1 62135C47
@ -1826,4 +1814,70 @@ Wire Wire Line
Connection ~ 7250 5500
Wire Wire Line
7250 5850 7250 5900
$Comp
L power:+6V #PWR0156
U 1 1 62056E3B
P 6450 5000
F 0 "#PWR0156" H 6450 4850 50 0001 C CNN
F 1 "+6V" H 6465 5173 50 0000 C CNN
F 2 "" H 6450 5000 50 0001 C CNN
F 3 "" H 6450 5000 50 0001 C CNN
1 6450 5000
1 0 0 -1
$EndComp
$Comp
L power:+6V #PWR0157
U 1 1 62094A4A
P 7250 5100
F 0 "#PWR0157" H 7250 4950 50 0001 C CNN
F 1 "+6V" H 7265 5273 50 0000 C CNN
F 2 "" H 7250 5100 50 0001 C CNN
F 3 "" H 7250 5100 50 0001 C CNN
1 7250 5100
1 0 0 -1
$EndComp
$Comp
L power:+6V #PWR0158
U 1 1 620B941D
P 9900 5100
F 0 "#PWR0158" H 9900 4950 50 0001 C CNN
F 1 "+6V" H 9915 5273 50 0000 C CNN
F 2 "" H 9900 5100 50 0001 C CNN
F 3 "" H 9900 5100 50 0001 C CNN
1 9900 5100
1 0 0 -1
$EndComp
$Comp
L power:+6V #PWR0159
U 1 1 620DEEFE
P 5450 6450
F 0 "#PWR0159" H 5450 6300 50 0001 C CNN
F 1 "+6V" H 5465 6623 50 0000 C CNN
F 2 "" H 5450 6450 50 0001 C CNN
F 3 "" H 5450 6450 50 0001 C CNN
1 5450 6450
1 0 0 -1
$EndComp
$Comp
L power:+6V #PWR0160
U 1 1 62102842
P 3600 6600
F 0 "#PWR0160" H 3600 6450 50 0001 C CNN
F 1 "+6V" H 3615 6773 50 0000 C CNN
F 2 "" H 3600 6600 50 0001 C CNN
F 3 "" H 3600 6600 50 0001 C CNN
1 3600 6600
1 0 0 -1
$EndComp
$Comp
L power:+6V #PWR0161
U 1 1 62128225
P 1200 6400
F 0 "#PWR0161" H 1200 6250 50 0001 C CNN
F 1 "+6V" H 1215 6573 50 0000 C CNN
F 2 "" H 1200 6400 50 0001 C CNN
F 3 "" H 1200 6400 50 0001 C CNN
1 1200 6400
1 0 0 -1
$EndComp
$EndSCHEMATC

File diff suppressed because it is too large Load Diff

View File

@ -705,4 +705,32 @@ X D 8 700 -400 100 U 40 0 1 1 P
ENDDRAW
ENDDEF
#
# TPS2590
#
DEF TPS2590 U 0 40 Y Y 1 F N
F0 "U" -400 100 50 H V C CNN
F1 "TPS2590" -50 -250 50 H V C CNN
F2 "Package_DFN_QFN:QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
S -400 50 300 -600 0 1 0 N
X In 1 -500 -150 100 R 50 50 1 1 I
X OUT 10 400 -350 100 L 50 50 1 1 O
X OUT 11 400 -250 100 L 50 50 1 1 O
X OUT 12 400 -150 100 L 50 50 1 1 O
X GND 13 100 150 100 D 50 50 1 1 I
X GND 14 0 150 100 D 50 50 1 1 I
X ~FLT 15 -100 150 100 D 50 50 1 1 O
X ~EN 16 -200 150 100 D 50 50 1 1 I
X In 2 -500 -250 100 R 50 50 1 1 I
X In 3 -500 -350 100 R 50 50 1 1 I
X In 4 -500 -450 100 R 50 50 1 1 I
X GND 5 -200 -700 100 U 50 50 1 1 I
X ~RTRY 6 -100 -700 100 U 50 50 1 1 I
X ILIM 7 0 -700 100 U 50 50 1 1 I
X IFLT 8 100 -700 100 U 50 50 1 1 I
X CT 9 400 -450 100 L 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library

View File

@ -1,4 +1,4 @@
update=Wed Jul 7 12:09:57 2021
update=Fri Jul 9 13:24:20 2021
version=1
last_client=kicad
[general]
@ -32,37 +32,34 @@ AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.08889999999999999
MinViaDiameter=0.4
MinTrackWidth=0.1143
MinViaDiameter=0.45
MinViaDrill=0.2
MinMicroViaDiameter=0.2
MinMicroViaDiameter=0.25
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.127
TrackWidth1=0.254
TrackWidth2=0.0889
TrackWidth3=0.1016
TrackWidth4=0.127
TrackWidth5=0.254
TrackWidth6=0.508
TrackWidth7=0.762
TrackWidth8=1.016
TrackWidth9=1.27
TrackWidth2=0.127
TrackWidth3=0.254
TrackWidth4=0.381
TrackWidth5=0.508
TrackWidth6=0.762
TrackWidth7=1.016
TrackWidth8=1.27
ViaDiameter1=0.45
ViaDrill1=0.25
ViaDiameter2=0.4
ViaDrill2=0.2
ViaDiameter3=0.45
ViaDrill3=0.25
ViaDiameter4=0.5
ViaDrill4=0.3
ViaDiameter5=0.8
ViaDrill5=0.5
ViaDiameter6=4.2
ViaDrill6=4
dPairWidth1=0.0889
ViaDiameter2=0.45
ViaDrill2=0.25
ViaDiameter3=0.5
ViaDrill3=0.3
ViaDiameter4=0.8
ViaDrill4=0.5
ViaDiameter5=4.2
ViaDrill5=4
dPairWidth1=0.127
dPairGap1=0.1016
dPairViaGap1=0.25
dPairWidth2=0.0889
dPairWidth2=0.127
dPairGap2=0.1016
dPairViaGap2=0.0889
SilkLineWidth=0.1524
@ -264,7 +261,7 @@ ViaDiameter=0.45
ViaDrill=0.25
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.0889
dPairWidth=0.127
dPairGap=0.1016
dPairViaGap=0.25
[pcbnew/Netclasses/1]

View File

@ -1,7 +1,7 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
$Descr A3 16535 11693
encoding utf-8
Sheet 1 8
Title ""
@ -171,8 +171,8 @@ $EndSheet
$Sheet
S 7250 650 1600 5500
U 60CB9D41
F0 "LVDS&IO" 50
F1 "LVDS&IO.sch" 50
F0 "LVDS_IO" 50
F1 "LVDS_IO.sch" 50
F2 "EEM0_0_P" I L 7250 750 50
F3 "EEM0_0_N" I L 7250 850 50
F4 "EEM0_1_P" I L 7250 950 50
@ -751,12 +751,13 @@ FSMC_CLK
Text Label 4200 3900 0 50 ~ 0
FSMC_NWAIT
$Sheet
S 2650 6000 650 300
S 2650 6000 650 400
U 60E3407A
F0 "CurrentSenser" 50
F1 "CurrentSenser.sch" 50
F2 "12V_SW" I R 3300 6100 50
F3 "12V_CURRENT" I R 3300 6200 50
F4 "12V_OUT_FAULT" I R 3300 6300 50
$EndSheet
Entry Wire Line
4100 3950 4200 4050