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525 Commits

Author SHA1 Message Date
Ryan Summers 8e4a7c8fa9 Adding documentation for ADCs and DACs 2020-12-15 16:46:12 +01:00
bors[bot] a71f790574
Merge #205 
205: pll: refine gains r=jordens a=jordens

this decouples frequency and phase gain

Co-authored-by: Robert Jördens <rj@quartiq.de>
 2020-12-15 11:19:34 +00:00
Robert Jördens 469c89ea70 pll: refine gains 2020-12-14 09:58:27 +01:00
bors[bot] 1425608647
Merge #202 
202: Fix/rj misc r=jordens a=jordens



Co-authored-by: Robert Jördens <rj@quartiq.de>
 2020-12-13 12:26:14 +00:00
Robert Jördens 75c4120258 cossin: buffer test data output 2020-12-13 13:24:28 +01:00
Robert Jördens 4fc1f4397e gha: upload only relevant 2020-12-13 13:24:28 +01:00
Sebastien Bourdeauducq 107a4ac96f update cargosha256 2020-12-12 16:33:37 +08:00
bors[bot] 9a0e47c7eb
Merge #201 
201: cossin bench: be fair to glibc r=jordens a=jordens



Co-authored-by: Robert Jördens <rj@quartiq.de>
 2020-12-11 18:21:31 +00:00
Robert Jördens d271dccaba cossin bench: be fair to glibc 2020-12-11 19:08:11 +01:00
bors[bot] e3ab2b2db5
Merge #200 
200: dsp: add host benchmark r=jordens a=jordens



Co-authored-by: Robert Jördens <rj@quartiq.de>
 2020-12-11 17:35:30 +00:00
Robert Jördens f8b121600e gha: add rust to artifact name 2020-12-11 18:34:42 +01:00
Robert Jördens 193b8e2228 gha: upload-artifacts@v2 2020-12-11 18:22:16 +01:00
Robert Jördens 3b7d90fb45 gha: artifact tweak 2020-12-11 18:07:15 +01:00
Robert Jördens 028ff3847d upload artifacts 2020-12-11 17:36:10 +01:00
Robert Jördens a70110d8cc gha: fix artifact 2020-12-11 17:27:02 +01:00
Robert Jördens d4fceea5d1 cossin: bench against (i32 as f32).sin_cos() 2020-12-11 17:26:50 +01:00
Robert Jördens 5cd93d3318 fmt 2020-12-11 17:08:16 +01:00
Robert Jördens a709ab171e gha: fix bors 2020-12-11 17:06:07 +01:00
Robert Jördens 4fbd729cb4 gha: fix toolchain components 2020-12-11 17:04:34 +01:00
Robert Jördens a85738a651 dsp: add host benchmark 2020-12-11 15:19:13 +01:00
Robert Jördens a53da3dc84
Merge pull request #199 from quartiq/feature/cossin-tuneup 
Feature/cossin tuneup
 2020-12-10 18:38:11 +01:00
Robert Jördens f6ca79a992
Merge pull request #198 from quartiq/dependabot/cargo/paste-1.0.4 
build(deps): bump paste from 1.0.3 to 1.0.4
 2020-12-10 18:05:03 +01:00
Robert Jördens de304c503b cargo: go back to target-cpu=cortex-m4 
Appears to give better code.
Test by matthusagh.
 2020-12-10 17:53:45 +01:00
Robert Jördens 72b7e72040 gitignore: no need to ignore table, is in OUT_DIR now 2020-12-10 17:49:46 +01:00
Robert Jördens b9751ae1d0 dsp/build.rs: add cargo tag 2020-12-10 17:17:59 +01:00
Robert Jördens 7fa4b76e4d cossin_table: fix build script usage 2020-12-10 17:17:09 +01:00
Robert Jördens 18ea94298b Merge remote-tracking branch 'origin/master' into trig 
* origin/master:
  Updating after review
  Fixing semantics
  Adding documentation
  Fixing buffer size
  Adding updated QSPI stream writer
  Increasing batch size
  Adding updates for QSPI streaming
  Adding WIP refactor
  Updating DDS control
  Removing pounder test, adding file
  Removing unused code
  Refactoring DDS output control
  Updating QSPI frequency
  Adding support for hardware IO_update
  Fixing merge issues
  Adding WIP
  Adding WIP HRTimer
  Adding WIP experimental code
  Adding WIP QSPI streaming
 2020-12-10 17:02:19 +01:00
Robert Jördens e592273218
Merge pull request #197 from matthuszagh/trig 
add cossin LUT
 2020-12-10 17:02:03 +01:00
Robert Jördens 77cb0bbad0 cossin: refactor and tweak 
* shrink the LUT by another bit
* correctly use the octant bit to offset the dphi to LUT entry midpoint
* add more diagnistics to the unittest and rewrite it in relative units
* MSB-align phase and output to match the PLL data, dynamic range and
  remove the need for roudning bias.
* clean up the build.rs table generator a bit
 2020-12-10 16:56:13 +01:00
dependabot[bot] afef1b0c26
build(deps): bump paste from 1.0.3 to 1.0.4 
Bumps [paste](https://github.com/dtolnay/paste) from 1.0.3 to 1.0.4.
- [Release notes](https://github.com/dtolnay/paste/releases)
- [Commits](https://github.com/dtolnay/paste/compare/1.0.3...1.0.4)

Signed-off-by: dependabot[bot] <support@github.com>
 2020-12-10 04:04:37 +00:00
Matt Huszagh a82b0f3e90 trig: fix formatting 2020-12-09 15:53:56 -08:00
Matt Huszagh 4add34cf9a add cossin LUT 2020-12-09 15:40:18 -08:00
Robert Jördens 85b8f12e5c
Merge pull request #186 from vertigo-designs/feature/qspi-stream 
Adding support for Pounder DDS QSPI profile stream
 2020-12-07 18:57:48 +01:00
Ryan Summers c00ac46c2c Merge branch 'master' into feature/qspi-stream 2020-12-07 18:51:32 +01:00
bors[bot] a62a3bcae8
Merge #194 
194: cargo: update, remove old badge, cleanup r=jordens a=jordens



Co-authored-by: Robert Jördens <rj@quartiq.de>
 2020-12-07 12:54:37 +00:00
bors[bot] 80e92b6949
Merge #193 
193: unwrap: comments, names r=jordens a=jordens



Co-authored-by: Robert Jördens <rj@quartiq.de>
 2020-12-07 12:47:31 +00:00
Ryan Summers 14a647867a Updating after review 2020-12-07 10:55:09 +01:00
Robert Jördens bc1ee21fcd cargo: update, remove old badge, cleanup 2020-12-06 21:01:43 +01:00
Robert Jördens 2ae0bdfd8d unwrap: comments, names 2020-12-06 17:07:38 +01:00
bors[bot] e3e786cfdb
Merge #190 
190: Feature/phase tools r=jordens a=jordens



Co-authored-by: Robert Jördens <rj@quartiq.de>
 2020-12-05 12:23:58 +00:00
Robert Jördens 4cfe6ba416 pll: add note on dithering 2020-12-05 13:18:02 +01:00
Robert Jördens 974fa6e220 unwrap: clean up docs and names 2020-12-05 12:55:22 +01:00
Robert Jördens 526fea8e23 unwrap: more tests 2020-12-05 12:32:27 +01:00
bors[bot] 9b6f9c5744
Merge #189 
189: Feature/unwrap r=jordens a=jordens



Co-authored-by: Robert Jördens <rj@quartiq.de>
 2020-12-05 10:44:55 +00:00
Robert Jördens 941a94bbf6 dsp/pll: style 2020-12-05 11:44:09 +01:00
Robert Jördens 47806a155d
Merge branch 'master' into feature/unwrap 2020-12-05 09:58:15 +01:00
Robert Jördens 2179560a3c unwrap: add phase unwrapping tools 2020-12-05 09:56:41 +01:00
Robert Jördens a7d0f8d774
Merge pull request #177 from matthuszagh/lockin-2 
Lock-in
 2020-12-05 08:16:25 +01:00
Robert Jördens 628845d356 pll: rename to just PLL 2020-12-05 08:12:07 +01:00
Robert Jördens 0072cda85f pll: add convergence test 2020-12-04 23:13:22 +01:00