169: build(deps): bump panic-semihosting from 0.5.4 to 0.5.6 r=jordens a=dependabot[bot]
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Bumps [panic-semihosting](https://github.com/rust-embedded/cortex-m) from 0.5.4 to 0.5.6.
<details>
<summary>Changelog</summary>
<p><em>Sourced from <a href="https://github.com/rust-embedded/cortex-m/blob/master/CHANGELOG.md">panic-semihosting's changelog</a>.</em></p>
<blockquote>
<h2>[v0.5.6] - 2018-08-27</h2>
<h3>Fixed</h3>
<ul>
<li>
<p>Removed duplicated symbols from binary blobs</p>
</li>
<li>
<p>The check-blobs.sh script</p>
</li>
</ul>
<h2>[v0.5.5] - 2018-08-27 - YANKED</h2>
<h3>Changed</h3>
<ul>
<li>This crate no longer depends on <code>arm-none-eabi-gcc</code>.</li>
</ul>
</blockquote>
</details>
<details>
<summary>Commits</summary>
<ul>
<li><a href="278ab0d5b9"><code>278ab0d</code></a> Merge <a href="https://github-redirect.dependabot.com/rust-embedded/cortex-m/issues/110">#110</a></li>
<li><a href="6cbe16430b"><code>6cbe164</code></a> fix check-blobs.sh</li>
<li><a href="399793b26b"><code>399793b</code></a> Merge <a href="https://github-redirect.dependabot.com/rust-embedded/cortex-m/issues/109">#109</a></li>
<li><a href="ca61baec53"><code>ca61bae</code></a> v0.5.5</li>
<li><a href="478418c0eb"><code>478418c</code></a> Merge <a href="https://github-redirect.dependabot.com/rust-embedded/cortex-m/issues/108">#108</a></li>
<li><a href="945e2683f8"><code>945e268</code></a> test PRs</li>
<li><a href="c33d890dcb"><code>c33d890</code></a> remove build dependency on arm-none-eabi-gcc</li>
<li>See full diff in <a href="https://github.com/rust-embedded/cortex-m/compare/v0.5.4...v0.5.6">compare view</a></li>
</ul>
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Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>
* origin/master:
Adding comment about checking for flag pass completion
Adding comments about execution hanging to transfer complete waits
Removing default parameter settings
Updating DAC SPI structures to own HAL SPI structure for safety guarantees
Moving constants to a new file
Removing copy to DAC buffers, adding in-place borrow of output buffers
Marking AXISRAM as NOLOAD
Refactoring timer channels to macros, adding safety notes
Adding DMA support for DAC writes
Adding sampling_timer file
Adding compile-time management of TIM2 channels
Reverting changeset
Adding documentation
Reverting openocd change
Adding updated docs for adc file
Combining ADC + DAC ISRs
Adding WIP updates
Formatting
Adding ADC/DAC modules
Adding WIP updates to using DMA
Robert Jördens
dependabot[bot]
bors[bot]
Ryan Summers
Ryan Summers
Matt Huszagh
Sebastien Bourdeauducq