Commit Graph

807 Commits

Author SHA1 Message Date
31781a9d0e iir_int: rounding bias 2021-02-09 12:17:48 +01:00
611bd3e855 ad9959/pounder: tweaks
* make a trait public
* use self-test
* this hasn't been tested
2021-02-08 15:24:52 +01:00
1b46f081c1 better formatting 2021-02-08 11:26:58 +01:00
deed11f110 lockin-external: simplify 2021-02-05 18:59:22 +01:00
47d8a74524 ci: simplify nightly 2021-02-04 17:01:18 +01:00
0343e5d8ab pounder timer is u16 2021-02-04 16:51:34 +01:00
f19988a1bd up the sample rate 2021-02-04 15:42:45 +01:00
2d492055f3 pounder stamper: overflow at u32 boundary 2021-02-04 15:42:29 +01:00
473bdaa9bc iir_int: use f64 for extreme filters 2021-02-04 15:21:05 +01:00
8314844aeb pounder: moved SAMPLE_BUFFER_SIZE 2021-02-04 13:36:24 +01:00
d32378e6c4 lockin-external: ignore timestamps related to capture overflows 2021-02-04 12:48:58 +01:00
f47ee38d31 move sample ticks and buffer size to design parameters 2021-02-04 12:48:25 +01:00
7ce90c4d31 input stamper: add deglitching 2021-02-04 12:47:35 +01:00
f250e036ca rpll: simplify parameters, add one test 2021-02-04 12:46:33 +01:00
bors[bot]
5951a0d41d
Merge #262
262: core_intrinsics attr need to be in the lib crate r=jordens a=jordens



Co-authored-by: Robert Jördens <rj@quartiq.de>
2021-02-03 17:15:46 +00:00
4dfe16fce8 ci: don't save binaries 2021-02-03 18:14:42 +01:00
1167c7693d bors: depend on test 2021-02-03 18:01:24 +01:00
4d37a5483f ci: add release automation 2021-02-03 17:59:44 +01:00
5c8f316160
Update ci.yml 2021-02-03 17:24:06 +01:00
748a02fc4f ci: slim down
* build binaries in one go
* have bors look at specific jobs and not meta-jobs
* don't do objdump anymore (gdb/embed handle elfs)
* include a nightly build
2021-02-03 16:51:35 +01:00
c557348523 core_intrinsics attr need to be in the lib crate 2021-02-03 15:26:13 +01:00
5945cfca75
Merge pull request #258 from vertigo-designs/feature/input-capture-fixes
Updating input capture for timers
2021-02-03 14:54:55 +01:00
a44804f3c1
Merge pull request #257 from quartiq/rj/bump-hal-smoltcp
bump HAL and smoltcp
2021-02-03 14:46:27 +01:00
ef22f5ab92 Fixing pounder input capture source 2021-02-03 14:11:00 +01:00
4e6f65b3e0 Fixing spacing 2021-02-03 13:42:43 +01:00
672ddfa3c3 pounder: also adapt to new hal 2021-02-03 13:25:00 +01:00
c5fde8563c deps: bump hal and smoltcp, adapt 2021-02-03 13:16:22 +01:00
a8c5502441 Merge remote-tracking branch 'origin/dependabot/cargo/stm32h7xx-hal-2b8a04c' into rj/bump-hal-smoltcp
* origin/dependabot/cargo/stm32h7xx-hal-2b8a04c:
  build(deps): bump stm32h7xx-hal from `3da22d4` to `2b8a04c`
2021-02-03 13:05:27 +01:00
5fc4720593 Merge remote-tracking branch 'origin/dependabot/cargo/smoltcp-0.7.0' into rj/bump-hal-smoltcp
* origin/dependabot/cargo/smoltcp-0.7.0:
  build(deps): bump smoltcp from 0.6.0 to 0.7.0
2021-02-03 13:04:16 +01:00
b57b666473 Updating input capture for timers 2021-02-03 13:03:17 +01:00
Ryan Summers
70f6d4e1c4
Merge pull request #256 from vertigo-designs/feature/cargo-embed-support
Adding support for cargo-embed
2021-02-02 18:21:24 +01:00
Ryan Summers
bf97b5972d
Update .gitignore
Co-authored-by: Robert Jördens <rj@quartiq.de>
2021-02-02 18:03:46 +01:00
fd54fe384e Adding Embed.toml file 2021-02-02 17:34:49 +01:00
e767072089 Adding support for cargo-embed 2021-02-02 17:33:58 +01:00
14abaad7de
Merge pull request #255 from quartiq/rj/timestamp-tweaks
Rj/timestamp tweaks
2021-02-02 16:11:33 +01:00
e423eff0e2 lockin-external: add doc 2021-02-02 15:50:31 +01:00
bd71136cdf hw/config: add TODO on synchronization 2021-02-02 15:46:50 +01:00
145b48074e timers: remove spurious tim2 reset 2021-02-02 15:42:51 +01:00
dcc71d5d11 iir: tweak math a bit 2021-02-02 15:41:47 +01:00
ddbfa9d988 timestamping: docs and naming 2021-02-02 14:34:48 +01:00
e1c87c149f timestamping_timer: also reset counter 2021-02-02 13:25:45 +01:00
854ed29b1a timestamp: pass overflows to the top and ignore them there 2021-02-02 12:34:20 +01:00
4475a2d040 timestamping: full u32 range
The sampling timer and the timestamping timer have the same period.
The sampling interval and the batch size are powers of two.
If the timestamping timer wraps at a power of two larger than the
batch period, it will wrap in sync with the batch period.

Even if it didn't the RPLL would handle that. But it requires that the
timer wraps at the u32/i32 boundary (or be shifted left to wrap there).
2021-02-02 11:36:10 +01:00
299b443e5f update cargosha256 2021-02-02 12:01:23 +08:00
69755305a9 rename cargosha256.nix to differentiate the binaries
* nixpkgs 20.09 imposes that cargoSha256 also depends on the package name, while 726ee7aa82 changes the package name from "stabilizer" to "stabilizer-dual-iir". Thus, the cargoSha256 value also needed to be updated.
2021-02-02 11:18:15 +08:00
6b02e84a5d
Merge pull request #254 from sergachev/master
readme: fix source path and binary names
2021-02-01 23:47:07 +01:00
Ilia Sergachev
e9a471bec9
readme: fix source path and binary names 2021-02-01 23:38:41 +01:00
b1cd6342fb
Merge pull request #253 from quartiq/rj/lockin-test
Rj/lockin test
2021-02-01 19:40:20 +01:00
2144af5bcd configuration: update to HITL ips 2021-02-01 19:32:20 +01:00
24a4486847 lockin-internal: rotate samples 2021-02-01 19:31:57 +01:00