dsleung

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• Joined on 2020-05-28

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dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-28 11:52:18 +08:00

b9f96a8ad0 Add DIVW instruction

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-28 11:45:54 +08:00

1eab79538a Add MULW instruction

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-28 11:38:04 +08:00

8fa2a33ecf Add RV64M R-Type Instruction

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 16:26:03 +08:00

5d17b917b4 Update README.md

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 16:22:08 +08:00

fe5e73b6cb Add RV64I Base ISA

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 16:04:08 +08:00

e7066b8c89 Add SRAW instruction

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 15:56:46 +08:00

d188b9cdac Add SRLW instruction

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 15:54:11 +08:00

b60b590fe1 Add SLLW instruction

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 15:50:41 +08:00

956be6570d Add SUBW instruction

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 15:48:22 +08:00

2055f5159b Add ADDW instruction

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 15:39:18 +08:00

6e4ecdcee0 Add RV64I R-Type Instruction

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 13:53:57 +08:00

cf295596ef Update README.md

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 13:52:34 +08:00

ade3d46b5b Add SRAIW instruction

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 13:42:48 +08:00

94c19ed7f7 Add SRLIW instruction

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 13:39:21 +08:00

d837f6f8f6 Add SLLIW instruction

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 13:28:40 +08:00

2790cb1f4c Add RV64I I-Type Instruction (Shift Variation)

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 13:12:32 +08:00

a15e57e12e Update README.md

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 13:11:34 +08:00

3a332c5c1d Add ADDIW instruction

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 12:54:35 +08:00

dae95900b6 Update README.md

dsleung pushed to master at M-Labs/riscv-formal-nmigen 2020-08-27 12:53:19 +08:00

0954ee7fa9 Add SD instruction