M-Labs
/
artiq
mirror of https://github.com/m-labs/artiq.git
2
0
Fork 2
Code Issues Projects Releases Wiki Activity
8,204 Commits 13 Branches 35 Tags 26 MiB
Commit Graph

8204 Commits

Author SHA1 Message Date
Peter Drmota 20e079a381
AD9910 driver feature extension and SUServo IIR readability (#1500) 
* coredevice.ad9910: Add set_cfr2 function and extend arguments of set_cfr1 and set_sync

* SUServo: Wrap CPLD and DDS devices in a list

* SUServo: Refactor [nfc]

Co-authored-by: drmota <peter.drmota@physics.ox.ac.uk>
Co-authored-by: David Nadlinger <code@klickverbot.at>
 2021-11-15 12:09:16 +08:00
Sebastien Bourdeauducq 222968d68b coredevice: reinstate AugAssign methods 2021-11-13 12:42:13 +08:00
Sebastien Bourdeauducq 7a2428b6a7 flake: update nac3 2021-11-13 12:33:07 +08:00
Sebastien Bourdeauducq 3f807ad19e flake: update nac3 2021-11-12 20:07:29 +08:00
Sebastien Bourdeauducq 38e554fe98 artiq_run: fix ELF handling 2021-11-12 19:57:48 +08:00
Sebastien Bourdeauducq 75dad8090f Merge branch 'master' into nac3 2021-11-12 19:46:37 +08:00
Sebastien Bourdeauducq f0c50c80e6 flake: update dependencies 2021-11-12 19:28:51 +08:00
Sebastien Bourdeauducq f07c747fa7 flake: update nac3, use patched nixpkgs from nac3 2021-11-12 16:27:08 +08:00
Sebastien Bourdeauducq 95eb218112 import_cache: read files only once 2021-11-11 20:42:49 +08:00
Sebastien Bourdeauducq 1ea3cf48d6 fix core.run invokation 2021-11-11 20:35:45 +08:00
Sebastien Bourdeauducq 5a3bf4894f reinstate import_cache hack (#416) 2021-11-11 20:35:06 +08:00
Sebastien Bourdeauducq 64c180c9e7 update NAC3 2021-11-11 16:51:56 +08:00
Sebastien Bourdeauducq c7cca11ad1 update NAC3 2021-11-11 16:32:37 +08:00
Sebastien Bourdeauducq a8129093df artiq_run: port to NAC3 (WIP) 2021-11-10 21:31:03 +08:00
Sebastien Bourdeauducq df87cc88d6 coredevice/ad9912: port to NAC3 2021-11-10 21:27:06 +08:00
Sebastien Bourdeauducq 93f24c9f94 coredevice/urukul: port to NAC3 2021-11-10 19:01:44 +08:00
Sebastien Bourdeauducq 31955d0c7a coredevice/spi2: port to NAC3 2021-11-10 17:23:44 +08:00
Sebastien Bourdeauducq b7313ddc32 coredevice/rtio: fix tuple annotation 2021-11-10 15:32:07 +08:00
Sebastien Bourdeauducq 46604300a2 flake: update dependencies 2021-11-10 14:59:02 +08:00
Sebastien Bourdeauducq 262cd62544 examples/blink_forever: port to NAC3 2021-11-10 13:59:59 +08:00
Sebastien Bourdeauducq 2f031285a4 coredevice/ttl: port to NAC3 2021-11-10 13:58:54 +08:00
Sebastien Bourdeauducq deb8a77464 coredevice/rtio: port to NAC3 2021-11-10 13:57:03 +08:00
Sebastien Bourdeauducq 8f596ed04f coredevice: fix typing problems 2021-11-10 12:37:05 +08:00
Sebastien Bourdeauducq c8ebd80fe2 NAC3 integration WIP 2021-11-10 12:18:20 +08:00
Sebastien Bourdeauducq 2f60a38a9c flake: update dependencies 2021-11-10 12:16:29 +08:00
Sebastien Bourdeauducq c029977a27 flake: update dependencies 2021-11-10 09:54:34 +08:00
Sebastien Bourdeauducq 80115fcc02 flake: apply llvmlite callsite patch 2021-11-08 17:34:30 +08:00
occheung ac2f55b3ff flake: patch llvmlite 2021-11-08 16:59:08 +08:00
occheung db3e5e83e6 bump misoc 2021-11-08 16:59:08 +08:00
occheung 09945ecc4d gateware: fix drtio/dma tests 2021-11-08 16:59:08 +08:00
occheung 02119282b8 build_soc: build VexRiscv_G if not kasli v1.x 2021-11-08 16:59:08 +08:00
occheung 750b0ce46d ddb_temp: select appropriate compiler target 2021-11-08 16:59:08 +08:00
occheung 531670d6c5 dyld: check ABI 2021-11-08 16:59:08 +08:00
occheung 0f660735bf ll_gen: adjust csr address by detecting target class 2021-11-08 16:59:08 +08:00
occheung 0755757601 compiler/tb: use FPU 2021-11-08 16:59:08 +08:00
occheung 0d708cd61a compiler/target: split RISCV target into float/non-float 2021-11-08 16:59:08 +08:00
occheung 03b803e764 firmware: adjust csr separation 2021-11-08 16:59:08 +08:00
occheung b3e315e24a rust: find json file using CARGO_TRIPLE 2021-11-08 16:59:08 +08:00
occheung 0898e101e2 board_misoc: reuse riscv dir for comm & kernel 2021-11-08 16:59:08 +08:00
occheung cb247f235f gateware: pass adr_w/data_w to submodules 2021-11-08 16:59:08 +08:00
occheung 90f944481c kernel_cpu: add fpu if not kasli v1.x 2021-11-08 16:59:08 +08:00
occheung d84ad0095b comm_cpu: select 64b bus if not kasli v1.x 2021-11-08 16:59:08 +08:00
occheung dd68b4ab82 mailbox: parametrize address width 2021-11-08 16:59:08 +08:00
occheung c6e0e26440 drtio: accept 32b/64b bus 2021-11-08 16:59:08 +08:00
occheung 8da924ec0f dma: set conversion granularity using bus width 2021-11-08 16:59:08 +08:00
Sebastien Bourdeauducq e5620a6b7f language: remove old type annotations 2021-11-03 22:07:44 +08:00
Sebastien Bourdeauducq a3543a5527 bump ARTIQ version number 2021-11-03 21:51:16 +08:00
Sebastien Bourdeauducq 9a1a8e0e81 update dependencies 2021-11-03 21:49:21 +08:00
Sebastien Bourdeauducq 977543e05a Merge branch 'master' into nac3 2021-11-03 21:37:18 +08:00
Robert Jördens 591507a7c0
Merge pull request #1774 from m-labs/fastino-cic 
Fastino cic
 2021-10-28 17:44:20 +02:00