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Commit Graph

37 Commits

Author SHA1 Message Date
Florent Kermarrec
74ce7319d3 sayma: reduce serwb linerate to 625Mbps (make it work on saymas with 1.8v issue, related?) 2018-01-20 06:04:18 +01:00
ed3e3b2791 sayma_amc: clarify --with-sawg help 2018-01-17 12:10:30 +01:00
Florent Kermarrec
f54b27b79c sayma_amc: prepare for jesd subclass 1 2018-01-17 11:49:36 +01:00
7405006668 sayma: rtio clock is jesd fabric clock 2018-01-16 18:19:04 +01:00
whitequark
444b901dbe sayma: add RTM configuration port. 2018-01-16 07:28:00 +00:00
7c82fcf41a targets: avoid passing cpu_type around unnecessarily 2018-01-11 11:21:55 +08:00
04b2fd3e13 sayma: fix AD9154NoSAWG ramp clock domain 2018-01-10 12:11:33 +08:00
Florent Kermarrec
1e972034e8 gateware/targets: enable serwb scrambling on sayma amc & rtm 2018-01-03 17:34:46 +01:00
745e695b09 sayma: output a ramp in the absence of SAWG channels 2017-12-31 12:18:53 +01:00
379d29561b sayma: plausibility assertion on sawg data stream 2017-12-29 19:15:40 +01:00
0681d472c7 conda: fix sayma_rtm_csr.csv location for Sayma AMC 2017-12-22 17:14:10 +08:00
44959144d8 conda: add Sayma AMC standalone board package 2017-12-22 16:44:04 +08:00
4fbc8772a5 sayma: allocate all user LEDs to RTIO, make one TTL SMA input 2017-12-21 19:27:38 +08:00
a23251276d Revert "sayma: set up Si5324 for RGMII clock rerouting"
This reverts commit 2b01aa22b6.
2017-12-21 14:42:15 +08:00
2b01aa22b6 sayma: set up Si5324 for RGMII clock rerouting 2017-12-17 00:25:33 +08:00
b6199bb35b sayma: style 2017-12-15 19:45:51 +08:00
5e251cd85c sayma_amc: remove redundant bitstream options
* CONFIGRATE default is sufficient
* SPI width can be auto and QSPI works
2017-12-13 14:39:32 +01:00
a9d0f253a5 sayma_amc: set bitstream and config parameters
* slow down CCLK rate as there is additional loading
  on the signals
* single bit SPI for now until we know that quad SPI
  works
* set up

https://github.com/m-labs/artiq/issues/847
2017-12-13 21:21:52 +08:00
bb3d6ef84a sayma: remove ad9154 from mem_map
Address is autogenerated by CSR system.
2017-11-29 18:17:25 +08:00
ecfe2e40ee sayma_amc_standalone: rtio channels for both sawg groups 2017-11-19 18:32:42 +01:00
d1a7c1c3a1 sayma_amc_standalone: connect sawg to jesd again 2017-11-19 14:36:20 +01:00
Florent Kermarrec
dfdd2dd9e6 gateware/targets/sayma_amc_standalone: revert self.add_wb_slave on serwb 2017-11-19 09:01:20 +01:00
Florent Kermarrec
cd83b71d92 gateware/targets/sayma_amc_standalone: serwb working, need fixing on AD9154 data mapping 2017-11-18 18:10:28 +01:00
Florent Kermarrec
464b24a608 gateware/targets/sayma_amc: integrate ad9154 correctly (add crg, use cpll instead of qpll, use correct clocking) and cleanup serwb constraints. 2017-11-10 10:48:32 +01:00
Florent Kermarrec
76ddb063cf gateware/targets/sayma: get hmc830/7043 spi working (still need to test clock generation) 2017-11-06 12:08:28 +01:00
5e3cc83842 sayma_amc: SAWG (untested) 2017-09-27 18:44:35 +02:00
Florent Kermarrec
2091c7696a artiq/gateware/targets/sayma_amc_standalone: fix serwb_pll vco_div and serwb_phy mode 2017-09-06 09:18:12 +02:00
a4144a07c4 sayma_amc: add converter SPI config defines 2017-08-31 13:04:38 +08:00
a67659338d sayma: clean up serwb comments 2017-08-31 11:42:01 +08:00
Florent Kermarrec
9650233007 gateware/serwb: change serdes clock domain to serwb_serdes 2017-08-30 15:44:44 +02:00
Florent Kermarrec
32ca51faee gateware/targets/sayma_amc_standalone/rtm: use new serwb modules 2017-08-30 15:25:20 +02:00
Florent Kermarrec
60ad36e7d6 gateware/serwb: generate wishbone error on wishbone slave when access while link is not ready 2017-08-29 13:43:26 +02:00
dbc12540da sayma_amc: register RTM CSR regions from CSV 2017-08-26 14:48:11 -07:00
668450db26 sayma_amc: add serwb 2017-08-21 18:11:29 -04:00
0459a70cf6 sayma_amc: cleanup, fix RTM UART forwarding 2017-08-21 16:49:42 -04:00
d6b624dfbe sayma_amc: connect RTM serial and second serial 2017-08-20 19:01:55 -04:00
bee4902323 add Sayma AMC standalone target 2017-08-20 11:47:45 -04:00