mirror of https://github.com/m-labs/artiq.git
gateware/targets: enable serwb scrambling on sayma amc & rtm
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@ -168,7 +168,7 @@ class Standalone(MiniSoC, AMPSoC):
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serwb_phy_amc.serdes.cd_serwb_serdes.clk,
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serwb_phy_amc.serdes.cd_serwb_serdes_5x.clk)
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serwb_core = serwb.core.SERWBCore(serwb_phy_amc, int(self.clk_freq), mode="slave")
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serwb_core = serwb.core.SERWBCore(serwb_phy_amc, int(self.clk_freq), mode="slave", with_scrambling=True)
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self.submodules += serwb_core
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self.add_wb_slave(self.mem_map["serwb"], 8192, serwb_core.etherbone.wishbone.bus)
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@ -159,7 +159,7 @@ class SaymaRTM(Module):
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serwb_phy_rtm.serdes.cd_serwb_serdes.clk,
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serwb_phy_rtm.serdes.cd_serwb_serdes_5x.clk)
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serwb_core = serwb.core.SERWBCore(serwb_phy_rtm, int(clk_freq), mode="master")
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serwb_core = serwb.core.SERWBCore(serwb_phy_rtm, int(clk_freq), mode="master", with_scrambling=True)
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self.submodules += serwb_core
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# process CSR devices and connect them to serwb
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