Commit Graph

8191 Commits

Author SHA1 Message Date
occheung b6c59a0cb3 update misoc dependencies
Suppress warning when compiling libunwind.
7242dc5a41
2022-01-11 17:32:19 +08:00
Steve Fan de5892a00a
comm_kernel: check if elements are within bounds for RPC list (#1824) 2022-01-11 17:16:45 +08:00
Peter Drmota 4eee49f889 gateware.test.suservo: Fix tests for python >=3.7
Closes #1748
2022-01-11 17:16:09 +08:00
occheung 9eee0e5a7b gateware/suservo: fix profile no. in test
Follow-up/Test update for 9d49302.
2022-01-11 14:20:47 +08:00
Steve Fan d7dd75e833 comm_kernel: fix off-by-one error for numeric value range check 2022-01-11 10:13:42 +08:00
Spaqin 095fb9e333
add Almazny support (#1780) 2022-01-11 09:55:39 +08:00
Sebastien Bourdeauducq 4e3e0d129c firmware: fix compilation warning 2022-01-11 09:31:26 +08:00
pca006132 12ee326fb4 firmware: fixed personality function 2022-01-11 09:30:19 +08:00
occheung 61349f9685 sinara_tester: fix outdated API 2022-01-10 17:23:28 +08:00
occheung cea0a15e1e suservo: use default urukul profile 2022-01-10 16:21:39 +08:00
occheung 8b45f917d1 urukul: use default profile 2022-01-10 16:21:39 +08:00
pca006132 6542b65db3 compiler: fixed exception codegen issues 2022-01-10 15:54:29 +08:00
pca006132 9f90088fa6 compiler: generate appropriate landingpad IR
When used together with modified personality function, we got ~20%
performance improvement in exception unwinding with zynq.
2022-01-10 15:54:29 +08:00
occheung 5e1847e7c1 compiler: rename `variables` to `retainedNodes`
Part of the changes that was made to LLVM 6 by the time that LLVM 7 was released.
LLVM commit: 2c864551df
LLVM differential review: https://reviews.llvm.org/D45024
2022-01-10 11:28:37 +08:00
occheung 6f3c49528d compiler: revert cabe5ac
The lack of debug emitter causes #1821.
2022-01-10 11:26:03 +08:00
Sebastien Bourdeauducq 02555e48a0 update NAC3, use power operator 2022-01-09 11:45:10 +08:00
Sebastien Bourdeauducq eaa1505c94 update documentation (#1820) 2022-01-08 11:55:52 +08:00
Leon Riesebos f42bea06a8 worker_db: removed warning for writing a dataset that is also in the archive
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2022-01-08 11:48:18 +08:00
occheung 9d493028e5 gateware/suservo: write to profile 7
Fixes #1817.
2022-01-07 16:41:19 +08:00
Sebastien Bourdeauducq 4ad8f5d6c7 flake: reexport and use mimalloc-enabled Python 2022-01-04 22:20:12 +08:00
Sebastien Bourdeauducq 59af28d6f7 flake: use LLVM 13 for consistency with NAC3 2022-01-04 22:11:19 +08:00
Sebastien Bourdeauducq 17d217d47d flake: update nac3 2022-01-04 22:09:52 +08:00
Sebastien Bourdeauducq c795cb40ea flake: update nac3 2021-12-28 11:49:01 +08:00
Sebastien Bourdeauducq 51cb8adba0 update NAC3 2021-12-26 08:50:02 +08:00
Sebastien Bourdeauducq bbac477092 tools: fix importlib issue 2021-12-21 13:20:11 +08:00
Sebastien Bourdeauducq 97365de104 flake: update nac3 2021-12-20 18:18:43 +08:00
Sebastien Bourdeauducq 243fe5ea88 flake: update nac3 2021-12-20 18:02:15 +08:00
Sebastien Bourdeauducq 088c3b470e update NAC3, use new Kernel type annotation 2021-12-20 17:56:40 +08:00
Sebastien Bourdeauducq d853604380 flake: update dependencies 2021-12-20 17:27:43 +08:00
Steve Fan c0a7be0a90 llvm_ir: move stacksave before lltag alloca in build_rpc
Signed-off-by: Steve Fan <sf@m-labs.hk>
2021-12-19 00:07:07 +00:00
Sebastien Bourdeauducq 9e5e234af3 stop using explicit ProactorEventLoop on Windows
It is now the default in Python.
2021-12-14 20:06:38 +08:00
Sebastien Bourdeauducq 352317df11 test_dataset_db: remove (too much breakage on Windows) 2021-12-14 19:27:15 +08:00
Sebastien Bourdeauducq a518963a47 test_dataset_db: disable tests broken on windows 2021-12-14 19:19:22 +08:00
Sebastien Bourdeauducq 37f14d94d0 test_dataset_db: fix for windows 2021-12-14 19:07:17 +08:00
Sebastien Bourdeauducq 4f723e19a6 RELEASE_NOTES: update 2021-12-14 00:05:49 +08:00
Peter Drmota 7c664142a5
Simplified use of the AD9910 RAM feature (#1584)
* coredevice: Change Urukul default single-tone profile to 7

This allows using the internal profile control in RAM modulation mode (which always starts to play back at profile 0) without competing for the content of the profile 0 register used in single tone mode.

Signed-off-by: Peter Drmota <peter.drmota@physics.ox.ac.uk>

* ad9910/set_mu: comment on caveats when setting register

* ad9910: avoid unnecessary write/param

Credit: Solution proposed by @pmldrmota in https://github.com/m-labs/artiq/pull/1584#issuecomment-987774353

* revert 1064fdff (`set_mu()` comments)

158a7be7 had addressed this issue.

Co-authored-by: occheung <dc@m-labs.hk>
2021-12-13 23:44:03 +08:00
Sebastien Bourdeauducq dad23b6981 coredevice/ad53xx: use len(list) 2021-12-09 12:40:01 +08:00
Sebastien Bourdeauducq 60cbde0820 flake: update dependencies 2021-12-09 12:35:33 +08:00
Etienne Wodey 33a9ca2684 tools/file_import: use SourceFileLoader
This allows loading modules from files with extensions not in
importlib.machinery.SOURCE_SUFFIXES

Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-12-09 11:47:04 +08:00
Sébastien Bourdeauducq 311a818a49
Merge pull request #1544 from airwoodix/dataset-compression
datasets: support compression in HDF5 archives
2021-12-06 12:43:19 +08:00
Sébastien Bourdeauducq 1def0d98c5
Merge branch 'master' into dataset-compression 2021-12-06 12:40:30 +08:00
Leon Riesebos 7ffe4dc2e3 coredevice: set default pow for ad9912 set_mu() 2021-12-06 12:34:55 +08:00
Leon Riesebos 9e3ea4e8ef coredevice: fixed type annotations for AD9910 2021-12-06 12:34:55 +08:00
Sebastien Bourdeauducq 31ac6881df update NAC3, restore original delays 2021-12-06 12:21:52 +08:00
Sebastien Bourdeauducq 61d3e22ea8 flake: update nac3 2021-12-05 14:37:33 +08:00
Sebastien Bourdeauducq 12512bfb2f flake: get rid of TARGET_AR 2021-12-05 14:37:09 +08:00
Sebastien Bourdeauducq 3f3186005e flake: get rid of TARGET_AR 2021-12-05 14:31:49 +08:00
Sebastien Bourdeauducq e34f4cc99b language: add floor64 and ceil64 2021-12-04 20:13:00 +08:00
Sebastien Bourdeauducq 12c39aaaae coredevice/adf5356: use nac3 floor/ceil 2021-12-04 19:04:48 +08:00
Sebastien Bourdeauducq 2059fd375e language: add virtual 2021-12-04 19:03:39 +08:00