RTIO/SYS Clock merge #212

Merged
sb10q merged 30 commits from mwojcik/artiq-zynq:rtiosys_clk_merge into master 2023-02-17 15:52:43 +08:00

30 Commits (master)

Author SHA1 Message Date
mwojcik f3ae8660d0 remove out-of-scope error LED support for satellite 2023-02-17 15:51:38 +08:00
mwojcik f7f956fc34 panic on sysclk not switched 2023-02-17 15:49:32 +08:00
mwojcik 65678fb4c2 kasli_soc: minor cleanup 2023-02-17 15:34:01 +08:00
mwojcik 02903503c6 libboard_artiq: fix warnings 2023-02-17 15:33:52 +08:00
mwojcik 5f10387684 remove FCLK completely as it's not used 2023-02-17 15:29:46 +08:00
mwojcik cff2caa88f zc706: support for 100mhz with new clocking system 2023-02-16 15:09:16 +08:00
mwojcik ae0d7c807f use external clock for bootstrap instead of fclk0 2023-02-16 14:52:24 +08:00
mwojcik 39c9ef2940 satman: wait for FCLK, check clk switch 2023-02-16 11:30:44 +08:00
mwojcik e86923b51d rtio_clocking: verify clock switch 2023-02-16 11:30:44 +08:00
mwojcik 062fa8e65d zynq_clocking: export clk switch status 2023-02-16 11:30:44 +08:00
mwojcik e6b9d5ebcb set fclk before doing anything else 2023-02-16 11:30:44 +08:00
mwojcik 83d530d8ac rtio_clocking: init drtio first 2023-02-16 11:30:44 +08:00
mwojcik aa0760e4ab kasli_soc: support clock switch on drtio configs 2023-02-16 11:30:44 +08:00
mwojcik dba8194f09 zc706: cleanup, support for clock switch 2023-02-16 11:30:44 +08:00
mwojcik 0e74afe64f satman: switch clocks 2023-02-16 11:30:44 +08:00
mwojcik 831079f95f rtio_clocking: PLL requires a bit more time to lock 2023-02-16 11:30:44 +08:00
mwojcik ca102d69c3 add fix_serdes_timing_path 2023-02-16 11:30:44 +08:00
mwojcik ac459617a6 rename clk signals, add "keep" attrs 2023-02-16 11:30:44 +08:00
mwojcik 3194b772ae move clocking to zynq_clocking
add clock-switching FSM
restore order
2023-02-16 11:30:44 +08:00
mwojcik b26731d83c flake: update dependencies 2023-02-16 11:30:44 +08:00
mwojcik 1aa6d0a16d test_dma: remove tsc mode 2023-02-16 11:30:44 +08:00
mwojcik 4aedc2fe61 zc706: fix TSC, PLL parameters 2023-02-16 11:30:44 +08:00
mwojcik c7e409520a extract main clock signal from SYSCRG 2023-02-16 11:30:44 +08:00
mwojcik 2cb4285a37 remove removed rtioclockmultiplier 2023-02-16 11:30:44 +08:00
mwojcik 4bf99bc63f zc706: remove pll_reset 2023-02-16 11:30:44 +08:00
mwojcik 9ac1338a32 test_dma: remove rtio cd 2023-02-16 11:30:44 +08:00
mwojcik 229cef0a07 zc706: change RTIO CRG to SYS 2023-02-16 11:30:44 +08:00
mwojcik 5ab402139c change init order, avoid providing bootstrap clock 2023-02-16 11:30:44 +08:00
mwojcik b34f445e55 rtio_clocking: remove unnecessary rtio_crg code 2023-02-16 11:30:44 +08:00
mwojcik e9d5c41c3d kasli_soc: merge sys/rtio on standalone 2023-02-16 11:30:44 +08:00