9423428bb0
drtio: fix crc32 offset address
2021-11-24 12:00:56 +08:00
7307b30213
flake: update to nixpkgs 21.11
2021-11-23 12:15:17 +08:00
b49f813b17
artiq_flash: ignore checking non-RTM artifacts if unused
2021-11-18 16:59:32 +08:00
Peter Drmota
20e079a381
AD9910 driver feature extension and SUServo IIR readability ( #1500 )
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* coredevice.ad9910: Add set_cfr2 function and extend arguments of set_cfr1 and set_sync
* SUServo: Wrap CPLD and DDS devices in a list
* SUServo: Refactor [nfc]
Co-authored-by: drmota <peter.drmota@physics.ox.ac.uk>
Co-authored-by: David Nadlinger <code@klickverbot.at>
2021-11-15 12:09:16 +08:00
f0c50c80e6
flake: update dependencies
2021-11-12 19:28:51 +08:00
46604300a2
flake: update dependencies
2021-11-10 14:59:02 +08:00
c029977a27
flake: update dependencies
2021-11-10 09:54:34 +08:00
80115fcc02
flake: apply llvmlite callsite patch
2021-11-08 17:34:30 +08:00
ac2f55b3ff
flake: patch llvmlite
2021-11-08 16:59:08 +08:00
db3e5e83e6
bump misoc
2021-11-08 16:59:08 +08:00
09945ecc4d
gateware: fix drtio/dma tests
2021-11-08 16:59:08 +08:00
02119282b8
build_soc: build VexRiscv_G if not kasli v1.x
2021-11-08 16:59:08 +08:00
750b0ce46d
ddb_temp: select appropriate compiler target
2021-11-08 16:59:08 +08:00
531670d6c5
dyld: check ABI
2021-11-08 16:59:08 +08:00
0f660735bf
ll_gen: adjust csr address by detecting target class
2021-11-08 16:59:08 +08:00
0755757601
compiler/tb: use FPU
2021-11-08 16:59:08 +08:00
0d708cd61a
compiler/target: split RISCV target into float/non-float
2021-11-08 16:59:08 +08:00
03b803e764
firmware: adjust csr separation
2021-11-08 16:59:08 +08:00
b3e315e24a
rust: find json file using CARGO_TRIPLE
2021-11-08 16:59:08 +08:00
0898e101e2
board_misoc: reuse riscv dir for comm & kernel
2021-11-08 16:59:08 +08:00
cb247f235f
gateware: pass adr_w/data_w to submodules
2021-11-08 16:59:08 +08:00
90f944481c
kernel_cpu: add fpu if not kasli v1.x
2021-11-08 16:59:08 +08:00
d84ad0095b
comm_cpu: select 64b bus if not kasli v1.x
2021-11-08 16:59:08 +08:00
dd68b4ab82
mailbox: parametrize address width
2021-11-08 16:59:08 +08:00
c6e0e26440
drtio: accept 32b/64b bus
2021-11-08 16:59:08 +08:00
8da924ec0f
dma: set conversion granularity using bus width
2021-11-08 16:59:08 +08:00
591507a7c0
Merge pull request #1774 from m-labs/fastino-cic
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Fastino cic
2021-10-28 17:44:20 +02:00
5a5b0cc7c0
fastino: expand docs
2021-10-28 15:19:48 +00:00
69cddc6b86
rtio_clocking: add warnings for unsupported rtio_clock settings ( #1773 )
2021-10-28 16:34:22 +08:00
9b1d7e297d
runtime: clock input specification improvements
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closes #1735
2021-10-28 16:21:51 +08:00
21b07dc667
flake: fix missing freetype & fontconfig libs for Vivado GUI mode
2021-10-28 14:39:47 +08:00
1ff474893d
Revert "fastino: make driver filter order configurable"
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This reverts commit 10c37b87ec
2021-10-28 06:29:56 +00:00
10c37b87ec
fastino: make driver filter order configurable
2021-10-27 20:24:58 +00:00
c940f104f1
artiq_flash: fix gateware header not in little-endian for RISC-V
2021-10-25 11:20:26 +08:00
0aa8a739aa
sayma_rtm: fix RTM firmware not in little-endian for RISC-V
2021-10-25 11:20:26 +08:00
43eab14f56
flake: update dependencies
2021-10-21 15:06:38 +08:00
cc15a4f572
flake: update Vivado
2021-10-21 11:24:55 +08:00
df6aeb99f6
flake: check gateware timing
2021-10-18 11:09:10 +08:00
bb61f2dae6
flake: update dependencies
2021-10-18 10:38:28 +08:00
b0cbad530b
flake: update dependencies
2021-10-16 19:10:28 +08:00
92cdfac35a
flake: fix cargoDeps sha256
2021-10-16 18:20:25 +08:00
bf180c168c
flake.lock: update dependencies
2021-10-16 17:42:24 +08:00
d5fa3d131a
cargo.lock: update libc version for libfringe
2021-10-16 17:42:24 +08:00
6d3164a912
riscv: print mtval on panic
2021-10-16 17:42:24 +08:00
46326716fd
runtime: bump libfringe, impl ecall abi
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See libfringe PR: M-Labs/libfringe#1
2021-10-16 17:42:24 +08:00
0a59c889de
satman/kern: init locked PMP on startup
2021-10-16 17:42:24 +08:00
27a7a96626
runtime: setup pmp + transfer to user
2021-10-16 17:42:24 +08:00
a0bf11b465
riscv: impl pmp
2021-10-16 17:42:24 +08:00
790a20edf6
linker: generate stack guard + symbol
2021-10-16 17:42:24 +08:00
fanmingyu212
178a86bcda
master: add an argument to set an experiment subdirectory
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Signed-off-by: Mingyu Fan <mingyufan@ucsb.edu>
2021-10-15 16:54:31 +08:00
