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8,131 Commits 63 Branches 34 Tags 19 MiB
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8131 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq d5795fd619 master: watchdog support 
Introduces a watchdog context manager to use in the experiment code that
terminates the process with an error if it times out. The syntax is:

with self.scheduler.watchdog(20*s):
   ...

Watchdogs timers are implemented by the master process (and the worker
communicates the necessary information about them) so that they can be
enforced even if the worker crashes. They can be nested arbitrarily.
During yields, all watchdog timers for the yielding worker are
suspended [TODO]. Setting up watchdogs is not supported in kernels,
however, a kernel can be called within watchdog contexts (and terminating
the worker will terminate the kernel [TODO]).

It is possible to implement a heartbeat mechanism using a watchdog, e.g.:

for i in range(...):
    with self.scheduler.watchdog(...):
        ....

Crashes/freezes within the iterator or the loop management would not be
detected, but they should be rare enough.
 2015-03-11 16:43:14 +01:00
Sebastien Bourdeauducq f2134fa4b2 master,worker: split prepare/run/analyze 2015-03-09 23:34:09 +01:00
Sebastien Bourdeauducq 4c280d5fcc master: use a new worker process for each experiment 2015-03-09 16:22:41 +01:00
Sebastien Bourdeauducq ec1d082730 remove timeout from run_params (to be replaced by a better mechanism) 2015-03-09 10:51:32 +01:00
Sebastien Bourdeauducq d95a9cac9a move realtime result registration into dbh, simplify syntax 2015-03-08 17:27:27 +01:00
Sebastien Bourdeauducq f2e3dfb848 Experiment base class, replace __artiq_unit__ with docstring 2015-03-08 15:55:30 +01:00
Sebastien Bourdeauducq 407477bc5a test: add ARTIQ_NO_PERIPHERALS environment variable to disable tests requiring non-core devices 2015-03-08 11:40:50 +01:00
Sebastien Bourdeauducq 0f007cb1a7 language/db: remove implicit_core 2015-03-08 11:37:53 +01:00
Sebastien Bourdeauducq ac697e3248 test/thorlabs_tcube: fix default serial port 2015-03-08 11:37:24 +01:00
Sebastien Bourdeauducq 28bce9ee40 artiqlib -> artiq.gateware 2015-03-08 11:00:24 +01:00
Sebastien Bourdeauducq 9fad01d967 test/thorlabs_tcube: fix test discovery and style 2015-03-04 23:53:49 +00:00
Yann Sionneau c2831db253 thorlabs_tcube: add realistic values for status bits and dc status in driver sim 2015-03-04 23:45:22 +00:00
Yann Sionneau 5091098eb0 thorlabs_tcube: driver PEP8 fix 2015-03-04 23:45:21 +00:00
Yann Sionneau bc19d6f7a8 thorlabs_tcube: add unit tests 2015-03-04 23:45:21 +00:00
Yann Sionneau 5b8691f7f5 thorlabs_tcube: fix driver spelling issues 2015-03-04 23:45:21 +00:00
Yann Sionneau 14c759ff89 add Thorlabs T-Cube NDSP 2015-03-04 14:30:49 +00:00
Sebastien Bourdeauducq 6062b42117 doc: update overview slides 2015-03-03 22:45:14 +00:00
Sebastien Bourdeauducq 15d09c0b94 runtime: use new uart tuning word function 2015-03-02 23:36:05 +00:00
Sebastien Bourdeauducq 4e5320be28 Merge branch 'master' of https://github.com/m-labs/artiq 2015-02-28 07:34:38 -07:00
Florent Kermarrec 9cf8db2f14 adapt code to MiSoC's changes 2015-02-28 07:34:11 -07:00
Sébastien Bourdeauducq 7028d85255 targets/ppro: disable L2 2015-02-27 18:02:21 -07:00
Joe Britton 0127de9bb5 soc: add_cpu_csr_region -> add_csr_region 2015-02-27 15:02:28 -07:00
Sebastien Bourdeauducq f307897bec units: fix strip_unit 2015-02-27 10:43:03 -07:00
Sebastien Bourdeauducq 0abd41a04a pc_rpc: trace support in server 2015-02-27 00:17:11 -07:00
Sebastien Bourdeauducq 3e46a36a4d lda: do not print attenuation value in simulation 2015-02-27 00:16:56 -07:00
Sebastien Bourdeauducq 61f33a9a04 soc/ad9858: do not put code in __init__.py 2015-02-26 23:31:43 -07:00
Sebastien Bourdeauducq ee9d616733 language/units: add strip_unit function 2015-02-26 23:31:07 -07:00
Sebastien Bourdeauducq 14e481d154 benchmarks: fix imports 2015-02-26 23:21:24 -07:00
Sebastien Bourdeauducq f855834810 gui/tools/DictSyncer: remove dead code 2015-02-26 22:10:53 -07:00
Sebastien Bourdeauducq da917f768e initial kc705 support 2015-02-26 21:50:52 -07:00
Yann Sionneau b672a99174 lda: add support for ping 2015-02-26 09:30:30 -07:00
Sebastien Bourdeauducq d51493fb5d language/core: fix interpreter implementations of time/cycle conversions 2015-02-25 21:15:46 -07:00
Yann Sionneau 1b5944257e units: add support for V (Volt) 2015-02-24 14:15:38 -07:00
Yann Sionneau 9485372277 units: add support for abs() on Quantity 2015-02-24 14:15:23 -07:00
Sebastien Bourdeauducq 651ed71b79 master: basic automatic experiment list 2015-02-21 20:34:31 -07:00
Sebastien Bourdeauducq 4267e0deab master,artiq_run: simplify unit autodetection 2015-02-21 20:26:58 -07:00
Sebastien Bourdeauducq 387de11e56 artiq_run: fix import 2015-02-21 20:09:46 -07:00
Sebastien Bourdeauducq 6601bebcfe master: make RIDs unique across restarts 2015-02-21 18:41:07 -07:00
Sebastien Bourdeauducq ceb02b42cb master: use full year in result folder name 2015-02-21 18:34:31 -07:00
Sebastien Bourdeauducq 965dd89b61 master: reorganize result output code 2015-02-21 14:28:18 -07:00
Sebastien Bourdeauducq 1aec6a0462 master: name results 'year-month-day/hour-minute/runid-experiment' 2015-02-21 13:42:26 -07:00
Sebastien Bourdeauducq cc172699ea master: use RID + unit class name for HDF5 filenames 2015-02-20 14:11:55 -07:00
Sebastien Bourdeauducq 65555a3a09 artiq_run,master: introduce __artiq_unit__ attribute to mark and name experiments 2015-02-20 14:01:34 -07:00
Yann Sionneau 5cfdac9c7c Lda: replace assert with direct exception raising 2015-02-20 10:21:15 -07:00
Sebastien Bourdeauducq 0dd5692c32 master,run: pass run_params to experiment 2015-02-19 20:05:12 -07:00
Sebastien Bourdeauducq 4d21b78314 master,client,gui: factor timeout into run_params 2015-02-19 20:03:55 -07:00
Sebastien Bourdeauducq cca6a17cfb examples/flopping_f_simulation: use scheduler API 2015-02-19 12:10:19 -07:00
Sebastien Bourdeauducq d01ba8e644 artiq_run: provide dummy scheduler API 2015-02-19 12:09:37 -07:00
Sebastien Bourdeauducq c69c4d5ce9 master: expose scheduler API to experiments 2015-02-19 12:09:11 -07:00
Sebastien Bourdeauducq 9ffc370416 master,run: automatically call analyze function 2015-02-19 09:40:15 -07:00