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a082a2bd0d
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use UART to transmit data out and plot wave using python for HSADC performance testing (working well @75MHz)
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2022-01-15 19:38:30 +08:00 |
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5d1c7c4d51
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FPGA BRAM working
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2022-01-15 15:54:47 +08:00 |
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900c0e292f
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add PLL to generate 50MHz clock for ADC
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2022-01-09 21:28:03 +08:00 |
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fe0d520b28
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use software FSMC to avoid FPGA strange inout issue
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2022-01-09 20:30:28 +08:00 |
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32098c89ae
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multiplexer working
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2021-12-31 10:57:11 +08:00 |
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259ec7e7ec
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HSADC working (under 25MHz clock); FSMC working; make file can generate fpga bitstram as C array
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2021-12-26 16:53:27 +08:00 |
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Zheng-Jiakun
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a01bf0c0c9
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change to STM32F103VFT6; add ADC and SW/LED IO labels; simple testing for 5V GND MOS switch
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2021-08-31 17:38:28 +08:00 |
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Zheng-Jiakun
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416bb29b83
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add ethernet controller spi driver
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2021-07-27 09:58:57 +08:00 |
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Zheng-Jiakun
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71f86fa2ab
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init project
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2021-07-26 17:17:04 +08:00 |
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