sinara-hw/Syrostan-MCU-C
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C 97.8%
Assembly 1.9%
C++ 0.2%
259ec7e7ec
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mikelam 259ec7e7ec HSADC working (under 25MHz clock); FSMC working; make file can generate fpga bitstram as C array
2021-12-26 16:53:27 +08:00
.vscode change to STM32F103VFT6; add ADC and SW/LED IO labels; simple testing for 5V GND MOS switch 2021-08-31 17:38:28 +08:00
Core HSADC working (under 25MHz clock); FSMC working; make file can generate fpga bitstram as C array 2021-12-26 16:53:27 +08:00
Drivers HSADC working (under 25MHz clock); FSMC working; make file can generate fpga bitstram as C array 2021-12-26 16:53:27 +08:00
FPGA HSADC working (under 25MHz clock); FSMC working; make file can generate fpga bitstram as C array 2021-12-26 16:53:27 +08:00
.gitignore add ethernet controller spi driver 2021-07-27 09:58:57 +08:00
.mxproject HSADC working (under 25MHz clock); FSMC working; make file can generate fpga bitstram as C array 2021-12-26 16:53:27 +08:00
fpga.nix change to STM32F103VFT6; add ADC and SW/LED IO labels; simple testing for 5V GND MOS switch 2021-08-31 17:38:28 +08:00
Makefile HSADC working (under 25MHz clock); FSMC working; make file can generate fpga bitstram as C array 2021-12-26 16:53:27 +08:00
startup_stm32f103xg.s change to STM32F103VFT6; add ADC and SW/LED IO labels; simple testing for 5V GND MOS switch 2021-08-31 17:38:28 +08:00
STM32F103VFTx_FLASH.ld change to STM32F103VFT6; add ADC and SW/LED IO labels; simple testing for 5V GND MOS switch 2021-08-31 17:38:28 +08:00
Syrostan-C.jdebug change to STM32F103VFT6; add ADC and SW/LED IO labels; simple testing for 5V GND MOS switch 2021-08-31 17:38:28 +08:00
Syrostan-C.jdebug.user HSADC working (under 25MHz clock); FSMC working; make file can generate fpga bitstram as C array 2021-12-26 16:53:27 +08:00
Syrostan-MCU-C.ioc HSADC working (under 25MHz clock); FSMC working; make file can generate fpga bitstram as C array 2021-12-26 16:53:27 +08:00