Ryan Summers
6eaf2cc073
Updating timestamp buffer logic
2020-12-07 18:19:20 +01:00
Ryan Summers
b191a3f01d
Updating timestamp timer to be more precise
2020-12-07 18:11:46 +01:00
Ryan Summers
ec046bc42d
Refactoring timer timestamping
2020-12-07 17:58:36 +01:00
Ryan Summers
fc81c8b5d8
Updating API
2020-12-07 17:29:36 +01:00
Ryan Summers
bdd3322dcb
Merge branch 'master' into feature/digital-input-stamp
2020-12-07 16:14:16 +01:00
Ryan Summers
93ab3b7dfd
Merge branch 'master' into feature/digital-input-stamp
2020-12-07 16:12:55 +01:00
bors[bot]
a62a3bcae8
Merge #194
...
194: cargo: update, remove old badge, cleanup r=jordens a=jordens
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-12-07 12:54:37 +00:00
bors[bot]
80e92b6949
Merge #193
...
193: unwrap: comments, names r=jordens a=jordens
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-12-07 12:47:31 +00:00
Robert Jördens
bc1ee21fcd
cargo: update, remove old badge, cleanup
2020-12-06 21:01:43 +01:00
Robert Jördens
2ae0bdfd8d
unwrap: comments, names
2020-12-06 17:07:38 +01:00
bors[bot]
e3e786cfdb
Merge #190
...
190: Feature/phase tools r=jordens a=jordens
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-12-05 12:23:58 +00:00
Robert Jördens
4cfe6ba416
pll: add note on dithering
2020-12-05 13:18:02 +01:00
Robert Jördens
974fa6e220
unwrap: clean up docs and names
2020-12-05 12:55:22 +01:00
Robert Jördens
526fea8e23
unwrap: more tests
2020-12-05 12:32:27 +01:00
bors[bot]
9b6f9c5744
Merge #189
...
189: Feature/unwrap r=jordens a=jordens
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-12-05 10:44:55 +00:00
Robert Jördens
941a94bbf6
dsp/pll: style
2020-12-05 11:44:09 +01:00
Robert Jördens
47806a155d
Merge branch 'master' into feature/unwrap
2020-12-05 09:58:15 +01:00
Robert Jördens
2179560a3c
unwrap: add phase unwrapping tools
2020-12-05 09:56:41 +01:00
Robert Jördens
a7d0f8d774
Merge pull request #177 from matthuszagh/lockin-2
...
Lock-in
2020-12-05 08:16:25 +01:00
Robert Jördens
628845d356
pll: rename to just PLL
2020-12-05 08:12:07 +01:00
Robert Jördens
0072cda85f
pll: add convergence test
2020-12-04 23:13:22 +01:00
bors[bot]
e87376314f
Merge #187
...
187: Added cascaded IIR with server commands for up to 2 cascaded IIRs per… r=jordens a=nkuh
… channel.
Note: If the number of cascaded IIRs is set to 1 the still existent server commands for the unused 2nd cascade level will be aliases for the 1st level.
Co-authored-by: Niklas Kuhrmeyer <niklas.kuhrmeyer@ptb.de>
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-12-04 18:21:54 +00:00
Robert Jördens
4f8bdb971b
main.rs: style
2020-12-04 18:22:53 +01:00
Robert Jördens
b23d5fa0dc
main.rs: whitespace
2020-12-04 18:22:38 +01:00
Matt Huszagh
43a760e57a
dsp testing: improve api for tolerance checking
2020-12-04 09:16:10 -08:00
Matt Huszagh
1b02f558f6
CI: specify test location using --package dsp
2020-12-04 09:16:10 -08:00
Matt Huszagh
55e7f1f0db
dsp: fix small comment grammar error
2020-12-04 09:16:10 -08:00
Matt Huszagh
0cca4589fd
lockin: compute reference period from the closest 2 timestamps to the ADC sample
2020-12-04 09:16:10 -08:00
Matt Huszagh
277a5d2d81
dsp: move common test code to testing.rs file
2020-12-04 09:16:09 -08:00
Matt Huszagh
260206e4f0
dsp: implement Complex as type alias for tuple
2020-12-04 09:15:33 -08:00
Matt Huszagh
d1b7efad48
dsp: replace in_phase and quadrature with Complex
2020-12-04 09:15:13 -08:00
Matt Huszagh
fcdfcb0be7
lockin: use single iir instance for both in-phase and quadrature signals
2020-12-04 09:14:39 -08:00
Matt Huszagh
785c98f93d
lockin: remove TIMESTAMP_BUFFER_SIZE constant
2020-12-04 09:14:39 -08:00
Matt Huszagh
90ef9f1e6a
lockin: borrow adc samples and timestamps as slices
2020-12-04 09:14:39 -08:00
Matt Huszagh
f259d6cf65
lockin: minor variable name changes
2020-12-04 09:14:39 -08:00
Matt Huszagh
9592bb74a7
lockin: change zip order in decimate for clarity
2020-12-04 09:14:39 -08:00
Matt Huszagh
4edda09d86
lockin: change demodulate to return result instead of option
2020-12-04 09:14:39 -08:00
Matt Huszagh
da4430e912
lockin: add documentation explaining timestamp decrement
2020-12-04 09:14:39 -08:00
Matt Huszagh
3c4e83bf0f
lockin: move fifo trait before use
...
This clarifies what it means to "push" to an array.
2020-12-04 09:14:39 -08:00
Matt Huszagh
8806feb423
lockin_low_pass: compute magnitude noise analytically
2020-12-04 09:14:39 -08:00
Matt Huszagh
8ae20009d7
add lock-in low-pass integration tests
2020-12-04 09:14:39 -08:00
Matt Huszagh
85adc8b1e1
add lockin module
2020-12-04 09:14:37 -08:00
Matt Huszagh
9a83d565ae
add dsp/target to gitignore
2020-12-04 09:13:58 -08:00
Matt Huszagh
b34c8bb8a1
add github CI test workflow
2020-12-04 09:13:58 -08:00
bors[bot]
4412ad28c3
Merge #188
...
188: pll: init r=jordens a=jordens
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-12-04 10:05:45 +00:00
Robert Jördens
644d85c115
pll: init
2020-12-04 10:53:36 +01:00
Niklas Kuhrmeyer
24222821b5
Added cascaded IIR with server commands for up to 2 cascaded IIRs per channel.
2020-12-03 14:10:28 +01:00
bors[bot]
051715ea32
Merge #180
...
180: Feature/adc dac io macros r=jordens a=jordens
I wanted to try macros.
This moves the ADC and DAC DMA setup into macros reducing code footprint. Hopefully no functional changes there.
I didn't test this on hardware and I may have missed differences between `Adc0`/`Adc1` and `Dac0`/`Dac1`.
It removes the `AdcInputs` and `DacOutputs` structs and replaces them with tuples as they were just fan-outs/fan-ins.
It also does some minor tweaks in the `process()` ISR towards higher flexibility enforces some data patterns to help the compiler.
Differences missing:
* [x] `.transfer_complete_interrupt(true)` for `Adc1` only: needed
* [x] `.circular_buffer(true);` for `Dac1` only: close #183
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-12-02 13:57:50 +00:00
Robert Jördens
31fcdcc97d
Merge branch 'master' into feature/adc-dac-io-macros
...
* master:
cargo: add docs for target cpu/features
iir: more generic math helpers, use core::intrinsics
cargo fmt [nfc]
iir: vminnm/vmaxnm
iir: fmt [nfc]
iir: fix comment [nfc]
cargo-config: cm7 features
iir: copy_within is better than rotate_right
processing: use faster unsafe truncate
2020-12-02 14:56:52 +01:00
bors[bot]
708e31dcb7
Merge #178
...
178: Feature/iir tweaks r=ryan-summers a=jordens
Some minor IIR tweaks and a couple more relevant compiler flags.
**Untested on hardware.**
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-12-02 12:46:20 +00:00