Commit Graph

517 Commits

Author SHA1 Message Date
bors[bot] 100b47f078
Merge #82
82: board: dma documentation r=jordens a=jordens



Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-02-14 14:07:54 +00:00
Robert Jördens 363100e3da deps/cortex-m: use cm7-r0p1 basepri erratum fix 2020-02-14 15:07:51 +01:00
Robert Jördens 2001149eda fmt 2020-02-14 15:06:50 +01:00
Robert Jördens 75eb4954b1 board: dma documentation 2020-02-14 12:26:16 +01:00
bors[bot] 05189fe8d2
Merge #81
81: build(deps): bump stm32h7 from 0.9.0 to 0.10.0 r=jordens a=dependabot-preview[bot]

Bumps [stm32h7](https://github.com/stm32-rs/stm32-rs) from 0.9.0 to 0.10.0.
<details>
<summary>Changelog</summary>
<p><em>Sourced from <a href="https://github.com/stm32-rs/stm32-rs/blob/master/CHANGELOG.md">stm32h7's changelog</a>.</em></p>
<blockquote>
<h2>[v0.10.0] 2020-02-13</h2>
<p>Family-specific:</p>
<ul>
<li>F0:
<ul>
<li>ADC documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/307">#307</a>)</li>
<li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li>
<li>Fix number of interrupt priority bits (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/325">#325</a>)</li>
</ul>
</li>
<li>F1:
<ul>
<li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li>
</ul>
</li>
<li>F2:
<ul>
<li>ADC documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/306">#306</a>)</li>
<li>DMA documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/322">#322</a>)</li>
<li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li>
</ul>
</li>
<li>F3:
<ul>
<li>ADC documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/305">#305</a>)</li>
<li>GPIO documentation for F373 and F3x8 (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/321">#321</a>)</li>
<li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li>
<li>Add COMP interrupts (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/302">#302</a>)</li>
</ul>
</li>
<li>F4:
<ul>
<li>ADC documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/313">#313</a>)</li>
<li>Add missing reset and enable registers in AHB3 (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/311">#311</a>)</li>
<li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li>
<li>DMA2D documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/333">#333</a>)</li>
</ul>
</li>
<li>F7:
<ul>
<li>ADC documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/310">#310</a>)</li>
<li>DMA documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/322">#322</a>, <a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/329">#329</a>)</li>
<li>Add STM32F730 (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/316">#316</a>)</li>
<li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li>
<li>DMA2D documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/333">#333</a>)</li>
</ul>
</li>
<li>H7:
<ul>
<li>ADC documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/312">#312</a>)</li>
<li>Fix EXTI access in single-core parts (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/318">#318</a>)</li>
<li>DMA documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/322">#322</a>)</li>
<li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li>
<li>Further dual core support (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/319">#319</a>)</li>
<li>DMA2D documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/333">#333</a>)</li>
<li>Split SOF field in DMAMUX.CSR (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/336">#336</a>)</li>
</ul>
</li>
<li>L0:
<ul>
<li>Fix FLASH_SR.EOP access (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/309">#309</a>)</li>
<li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li>
</ul>
</li>
<li>L4:
<ul>
<li>Fix USART3RST in RCC (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/243">#243</a>)</li>
<li>Fix APB1ENR1 SPI2EN name (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/315">#315</a>)</li>
<li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li>
</ul>
</li>
<li>G0:
<ul>
<li>Fix number of interrupt priority bits (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/304">#304</a>)</li>
<li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li>
</ul>
</li>
<li>G4:
<ul>
<li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li>
</ul>
</li>
</ul>
</tr></table> ... (truncated)
</blockquote>
</details>
<details>
<summary>Commits</summary>
<ul>
<li><a href="9f2cc564c2"><code>9f2cc56</code></a> v0.10.0</li>
<li><a href="5fe9874a52"><code>5fe9874</code></a> Merge pull request <a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/336">#336</a> from stm32-rs/split-sof</li>
<li><a href="ea8f1dd51e"><code>ea8f1dd</code></a> Split SOF in DMAMUX.CSR. Closes <a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/317">#317</a>.</li>
<li><a href="9912df71aa"><code>9912df7</code></a> Fix USART3RST in STM32L4x1/2. Closes <a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/243">#243</a>.</li>
<li><a href="cecd08fa5a"><code>cecd08f</code></a> Merge branch 'FLamparski-apply-otg-fixes-stm32f446'</li>
<li><a href="1f908049c2"><code>1f90804</code></a> Merge branch 'apply-otg-fixes-stm32f446' of <a href="https://github.com/FLamparski/stm">https://github.com/FLamparski/stm</a>...</li>
<li><a href="a34ddd5bca"><code>a34ddd5</code></a> nightlies build: don't remove cargo binary directory</li>
<li><a href="85c957e6e9"><code>85c957e</code></a> Merge <a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/335">#335</a></li>
<li><a href="2e65ff63ac"><code>2e65ff6</code></a> Correct stm32g4 comparator register offsets.</li>
<li><a href="7949dec45d"><code>7949dec</code></a> Description typo</li>
<li>Additional commits viewable in <a href="https://github.com/stm32-rs/stm32-rs/compare/v0.9.0...v0.10.0">compare view</a></li>
</ul>
</details>
<br />


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Co-authored-by: dependabot-preview[bot] <27856297+dependabot-preview[bot]@users.noreply.github.com>
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-02-14 09:47:02 +00:00
Robert Jördens 8b26996ecf board: dma.st.ndtr.ndt.bits is safe 2020-02-14 09:44:09 +00:00
dependabot-preview[bot] ed7e31eff9
build(deps): bump stm32h7 from 0.9.0 to 0.10.0
Bumps [stm32h7](https://github.com/stm32-rs/stm32-rs) from 0.9.0 to 0.10.0.
- [Release notes](https://github.com/stm32-rs/stm32-rs/releases)
- [Changelog](https://github.com/stm32-rs/stm32-rs/blob/master/CHANGELOG.md)
- [Commits](https://github.com/stm32-rs/stm32-rs/compare/v0.9.0...v0.10.0)

Signed-off-by: dependabot-preview[bot] <support@dependabot.com>
2020-02-14 04:26:59 +00:00
bors[bot] c62c2bb156
Merge #78
78: build(deps): bump cortex-m-rt from 0.6.11 to 0.6.12 r=jordens a=dependabot-preview[bot]

Bumps [cortex-m-rt](https://github.com/rust-embedded/cortex-m-rt) from 0.6.11 to 0.6.12.
<details>
<summary>Changelog</summary>
<p><em>Sourced from <a href="https://github.com/rust-embedded/cortex-m-rt/blob/v0.6.12/CHANGELOG.md">cortex-m-rt's changelog</a>.</em></p>
<blockquote>
<h2>[v0.6.12] - 2020-01-26</h2>
<h3>Fixed</h3>
<ul>
<li>Fixed lint warnings getting emitted on macro-generated code.</li>
</ul>
</blockquote>
</details>
<details>
<summary>Commits</summary>
<ul>
<li><a href="17ea2ee386"><code>17ea2ee</code></a> Merge <a href="https://github-redirect.dependabot.com/rust-embedded/cortex-m-rt/issues/242">#242</a></li>
<li><a href="00d300b2e9"><code>00d300b</code></a> Update changelog for 0.6.12</li>
<li><a href="24afb1d0ce"><code>24afb1d</code></a> Bump crate versions</li>
<li><a href="f31ec87545"><code>f31ec87</code></a> Update error message to pass compile-fail tests</li>
<li><a href="b25b619abe"><code>b25b619</code></a> Add a test that enables ALL the warnings</li>
<li><a href="0b2704b070"><code>0b2704b</code></a> <code>#[allow(missing_docs)]</code> on <code>#[pre_init]</code> hooks</li>
<li><a href="431f6d85bf"><code>431f6d8</code></a> Added missing hidden doc</li>
<li><a href="4741844640"><code>4741844</code></a> Hide trampolines from docs</li>
<li>See full diff in <a href="https://github.com/rust-embedded/cortex-m-rt/compare/v0.6.11...v0.6.12">compare view</a></li>
</ul>
</details>
<br />


[![Dependabot compatibility score](https://api.dependabot.com/badges/compatibility_score?dependency-name=cortex-m-rt&package-manager=cargo&previous-version=0.6.11&new-version=0.6.12)](https://dependabot.com/compatibility-score.html?dependency-name=cortex-m-rt&package-manager=cargo&previous-version=0.6.11&new-version=0.6.12)

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2020-02-03 08:32:20 +00:00
dependabot-preview[bot] a4b43bfcb6
build(deps): bump cortex-m-rt from 0.6.11 to 0.6.12
Bumps [cortex-m-rt](https://github.com/rust-embedded/cortex-m-rt) from 0.6.11 to 0.6.12.
- [Release notes](https://github.com/rust-embedded/cortex-m-rt/releases)
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2020-02-03 08:29:45 +00:00
bors[bot] 9f8faf8453
Merge #79
79: build(deps): bump heapless from 0.5.2 to 0.5.3 r=jordens a=dependabot-preview[bot]

Bumps [heapless](https://github.com/japaric/heapless) from 0.5.2 to 0.5.3.
<details>
<summary>Changelog</summary>
<p><em>Sourced from <a href="https://github.com/japaric/heapless/blob/master/CHANGELOG.md">heapless's changelog</a>.</em></p>
<blockquote>
<h2>[v0.5.3] - 2020-01-27</h2>
<h3>Added</h3>
<ul>
<li>Extend the ARMv7-A <code>Pool</code> support to the bare-metal <code>armv7a-</code> targets.</li>
</ul>
</blockquote>
</details>
<details>
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<ul>
<li><a href="1d6c207917"><code>1d6c207</code></a> Merge <a href="https://github-redirect.dependabot.com/japaric/heapless/issues/142">#142</a></li>
<li><a href="7de6f7907d"><code>7de6f79</code></a> Extend the ARMv7-A <code>Pool</code> support to the bare-metal <code>armv7a-</code> targets.</li>
<li>See full diff in <a href="https://github.com/japaric/heapless/compare/v0.5.2...v0.5.3">compare view</a></li>
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2020-02-03 08:21:10 +00:00
dependabot-preview[bot] 415aeafb9f
build(deps): bump heapless from 0.5.2 to 0.5.3
Bumps [heapless](https://github.com/japaric/heapless) from 0.5.2 to 0.5.3.
- [Release notes](https://github.com/japaric/heapless/releases)
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2020-01-28 04:25:19 +00:00
Robert Jördens 0fd442e67f release 0.3.0 2020-01-21 13:06:09 +01:00
bors[bot] 0434ee4288
Merge #77
77: Smoltcp 0.6 and bump deps r=jordens a=jordens



Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-01-21 11:46:15 +00:00
Robert Jördens 385791a827 Cargo.toml: style 2020-01-21 12:45:11 +01:00
Robert Jördens 289d40ede3 deps: bump indirect 2020-01-21 12:41:38 +01:00
Robert Jördens 6dab519470 deps: smoltcp 0.6 2020-01-21 12:36:47 +01:00
bors[bot] 3c60a72fb6
Merge #74
74: build(deps): bump serde from 1.0.103 to 1.0.104 r=jordens a=dependabot-preview[bot]

Bumps [serde](https://github.com/serde-rs/serde) from 1.0.103 to 1.0.104.
<details>
<summary>Release notes</summary>

*Sourced from [serde's releases](https://github.com/serde-rs/serde/releases).*

> ## v1.0.104
> - Revert stabilization of Serialize/Deserialize impls for `!` to account for [rust-lang/rust#67224](https://github-redirect.dependabot.com/rust-lang/rust/pull/67224)
</details>
<details>
<summary>Commits</summary>

- [`234fbfd`](234fbfd7e3) Release 1.0.104
- [`b9909ce`](b9909cef3d) Revert "Remove never_type feature gate"
- [`d540e72`](d540e72fc7) Format with rustfmt 2019-10-07
- [`13d0899`](13d0899776) Add missing import in de_enum expand test
- [`4fefa7a`](4fefa7a01d) Format imports in expandtest inputs
- [`9048660`](90486607a1) Update test suite to nightly-2019-11-26
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Sebastien Bourdeauducq 240f8d1921 update cargosha256 2020-01-05 10:43:58 +08:00
dependabot-preview[bot] 60b5f5d5b3
build(deps): bump serde from 1.0.103 to 1.0.104
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bors[bot] c75d1f5174
Merge #73
73: deps: bump (rt, rand, syn etc) r=jordens a=jordens



Co-authored-by: Robert Jördens <rj@quartiq.de>
2019-12-10 13:13:06 +00:00
Robert Jördens bd9e4a312f deps: bump (rt, rand, syn etc) 2019-12-10 13:12:01 +00:00
bors[bot] 2dd177bf58
Merge #72
72: build(deps): bump cortex-m-rt from 0.6.10 to 0.6.11 r=jordens a=dependabot-preview[bot]

Bumps [cortex-m-rt](https://github.com/rust-embedded/cortex-m-rt) from 0.6.10 to 0.6.11.
<details>
<summary>Changelog</summary>

*Sourced from [cortex-m-rt's changelog](https://github.com/rust-embedded/cortex-m-rt/blob/master/CHANGELOG.md).*

> ## [v0.6.11] - 2019-12-04
> 
> ### Changed
> 
> - Macros now generate a second trampoline function instead of randomizing the
>   function's symbol name. This makes the build deterministic.
> - [breaking-change] `static mut` resources no longer have `'static` lifetime
>   except in the `#[entry]` function (this is a soundness fix; see [#212](https://github-redirect.dependabot.com/rust-embedded/cortex-m-rt/issues/212)).
> 
> [#212](https://github-redirect.dependabot.com/rust-embedded/cortex-m-rt/issues/212): [rust-embedded/cortex-m-rt#212](https://github-redirect.dependabot.com/rust-embedded/cortex-m-rt/issues/212)
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- [`0c1322d`](0c1322d287) Inline attr. macro docs and fix links
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- [`0ae866a`](0ae866a286) travis: disable cache
- [`f17983a`](f17983ad32) Merge [#218](https://github-redirect.dependabot.com/rust-embedded/cortex-m-rt/issues/218)
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dependabot-preview[bot] d69519d189
build(deps): bump cortex-m-rt from 0.6.10 to 0.6.11
Bumps [cortex-m-rt](https://github.com/rust-embedded/cortex-m-rt) from 0.6.10 to 0.6.11.
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bors[bot] 4f34a0977d
Merge #68
68: build(deps): bump serde from 1.0.102 to 1.0.103 r=jordens a=dependabot-preview[bot]

Bumps [serde](https://github.com/serde-rs/serde) from 1.0.102 to 1.0.103.
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> ## v1.0.103
> - Support deserializing untagged unit variants from formats that treat unit as None ([#1668](https://github-redirect.dependabot.com/serde-rs/serde/issues/1668))
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Sebastien Bourdeauducq cca1d8d2f1 update cargosha256 2019-11-25 14:39:38 +08:00
dependabot-preview[bot] bae36a1333
build(deps): bump serde from 1.0.102 to 1.0.103
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bors[bot] 321c9e5c17
Merge #61
61: global: rustfmt r=jordens a=jordens



Co-authored-by: Robert Jördens <rj@quartiq.de>
Co-authored-by: bors[bot] <26634292+bors[bot]@users.noreply.github.com>
2019-11-24 14:14:41 +00:00
Robert Jördens 57c9f90f69 board: fix unicode 2019-11-24 15:11:53 +01:00
Robert Jördens 2662bf8bbc travis: clippy and rustfmt 2019-11-24 15:10:01 +01:00
Robert Jördens b34fdf7c48 rustfmt: run 2019-11-24 15:10:01 +01:00
bors[bot] 501b3c11d3
Merge #67
67: Clippy lint r=jordens a=jordens

bors r+

Co-authored-by: Robert Jördens <rj@quartiq.de>
2019-11-24 14:05:58 +00:00
Robert Jördens 8c2c0a2027 clippy: allow missing safety doc (rtfm) 2019-11-24 15:04:29 +01:00
Robert Jördens bda0ca26fb i2c/eeprom: lint 2019-11-24 14:55:20 +01:00
bors[bot] d2f8b60c27
Merge #65
65: Tim2 late enable r=jordens a=jordens

does this work for you @cjbe?

bors r+

Co-authored-by: Robert Jördens <rj@quartiq.de>
2019-11-24 13:33:50 +00:00
Robert Jördens 1140b4fb76 board: enable TIM2 late
This was triggered by moving log_init and adding i2c_init on top of
the existing ethernet setup/init after the timer setup and enable.
Thanks @cjbe for debugging.

Also move the RCC peripheral enable calls out of i2c and eth setup.

close #55
supersedes #62
2019-11-24 14:26:27 +01:00
bors[bot] 3cf4f2690c
Merge #64
64: boards.rs: dos2unix r=jordens a=jordens

bors r+

@cjbe heads up

Co-authored-by: Robert Jördens <rj@quartiq.de>
2019-11-24 13:25:08 +00:00
Robert Jördens 8e84e61ff3 boards.rs: dos2unix 2019-11-24 14:15:11 +01:00
bors[bot] f3d2591e42
Merge #63
63: Default kp 1 r=jordens a=jordens

bors r+

Co-authored-by: Robert Jördens <rj@quartiq.de>
2019-11-24 13:13:55 +00:00
Robert Jördens bf65b5f14a default to k_p=1 on boot 2019-11-24 13:10:01 +00:00
bors[bot] af0c9a4903
Merge #59
59: deps: bump and mainline serde-json-core r=jordens a=jordens

bors r+

Co-authored-by: Robert Jördens <rj@quartiq.de>
2019-11-20 16:23:35 +00:00
Robert Jördens 712f51c015 lock: fix smoltcp 2019-11-20 17:22:44 +01:00
Robert Jördens 611043f2e2 deps: bump and mainline serde-json-core 2019-11-20 17:15:54 +01:00
bors[bot] 78f3a4884b
Merge #58
58: deps: rtfm 0.5.1 (systick and cyccntr fixes) r=jordens a=jordens

bors r+

Co-authored-by: Robert Jördens <rj@quartiq.de>
2019-11-19 17:38:02 +00:00
Robert Jördens 5dfdb9014d deps: rtfm 0.5.1 (systick and cyccntr fixes) 2019-11-19 18:36:42 +01:00
bors[bot] 77dd549de9
Merge #57
57: Bump indirect r=jordens a=jordens

bors r+

Co-authored-by: Robert Jördens <rj@quartiq.de>
2019-11-19 11:37:52 +00:00
Robert Jördens d141f65380 deps: bump indirect serde_derive/syn/hash32 2019-11-19 12:29:34 +01:00
Robert Jördens 2bfecd847b deps: bump rtfm indirect deps 2019-11-19 12:28:52 +01:00
bors[bot] cd6477e071
Merge #56
56: deps: rtfm release 0.5 r=jordens a=jordens

bors r+

Co-authored-by: Robert Jördens <rj@quartiq.de>
2019-11-19 11:28:05 +00:00
Robert Jördens cc658a5c7b deps: rtfm release 0.5 2019-11-19 12:26:08 +01:00
bors[bot] 8045c19f53
Merge #49
49: fix memory safety issue in ethernet interface (closes #33) r=jordens a=cjbe

The CPU is allowed to implement normal memory writes out-of-order. Here
the write to the OWN flag in the DMA descriptor (normal memory) was
placed after the DMA tail pointer advance (in device memory, so not
reorderable). This meant the ethernet DMA engine stalled as it saw
a descriptor it did not own, and only restarted and sent the packet
when the next packet was released.

This fix will work as long as the CPU data cache is disabled. If we
want to enable the cache, the simplest method would be to mark SRAM3
as uncacheable via the MPU.

Co-authored-by: Chris Ballance <chris.ballance@physics.ox.ac.uk>
2019-11-16 07:26:22 +00:00