Merge #81
81: build(deps): bump stm32h7 from 0.9.0 to 0.10.0 r=jordens a=dependabot-preview[bot] Bumps [stm32h7](https://github.com/stm32-rs/stm32-rs) from 0.9.0 to 0.10.0. <details> <summary>Changelog</summary> <p><em>Sourced from <a href="https://github.com/stm32-rs/stm32-rs/blob/master/CHANGELOG.md">stm32h7's changelog</a>.</em></p> <blockquote> <h2>[v0.10.0] 2020-02-13</h2> <p>Family-specific:</p> <ul> <li>F0: <ul> <li>ADC documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/307">#307</a>)</li> <li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li> <li>Fix number of interrupt priority bits (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/325">#325</a>)</li> </ul> </li> <li>F1: <ul> <li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li> </ul> </li> <li>F2: <ul> <li>ADC documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/306">#306</a>)</li> <li>DMA documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/322">#322</a>)</li> <li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li> </ul> </li> <li>F3: <ul> <li>ADC documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/305">#305</a>)</li> <li>GPIO documentation for F373 and F3x8 (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/321">#321</a>)</li> <li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li> <li>Add COMP interrupts (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/302">#302</a>)</li> </ul> </li> <li>F4: <ul> <li>ADC documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/313">#313</a>)</li> <li>Add missing reset and enable registers in AHB3 (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/311">#311</a>)</li> <li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li> <li>DMA2D documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/333">#333</a>)</li> </ul> </li> <li>F7: <ul> <li>ADC documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/310">#310</a>)</li> <li>DMA documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/322">#322</a>, <a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/329">#329</a>)</li> <li>Add STM32F730 (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/316">#316</a>)</li> <li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li> <li>DMA2D documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/333">#333</a>)</li> </ul> </li> <li>H7: <ul> <li>ADC documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/312">#312</a>)</li> <li>Fix EXTI access in single-core parts (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/318">#318</a>)</li> <li>DMA documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/322">#322</a>)</li> <li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li> <li>Further dual core support (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/319">#319</a>)</li> <li>DMA2D documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/333">#333</a>)</li> <li>Split SOF field in DMAMUX.CSR (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/336">#336</a>)</li> </ul> </li> <li>L0: <ul> <li>Fix FLASH_SR.EOP access (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/309">#309</a>)</li> <li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li> </ul> </li> <li>L4: <ul> <li>Fix USART3RST in RCC (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/243">#243</a>)</li> <li>Fix APB1ENR1 SPI2EN name (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/315">#315</a>)</li> <li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li> </ul> </li> <li>G0: <ul> <li>Fix number of interrupt priority bits (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/304">#304</a>)</li> <li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li> </ul> </li> <li>G4: <ul> <li>EXTI documentation (<a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/314">#314</a>)</li> </ul> </li> </ul> </tr></table> ... (truncated) </blockquote> </details> <details> <summary>Commits</summary> <ul> <li><a href="9f2cc564c2"><code>9f2cc56</code></a> v0.10.0</li> <li><a href="5fe9874a52"><code>5fe9874</code></a> Merge pull request <a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/336">#336</a> from stm32-rs/split-sof</li> <li><a href="ea8f1dd51e"><code>ea8f1dd</code></a> Split SOF in DMAMUX.CSR. Closes <a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/317">#317</a>.</li> <li><a href="9912df71aa"><code>9912df7</code></a> Fix USART3RST in STM32L4x1/2. Closes <a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/243">#243</a>.</li> <li><a href="cecd08fa5a"><code>cecd08f</code></a> Merge branch 'FLamparski-apply-otg-fixes-stm32f446'</li> <li><a href="1f908049c2"><code>1f90804</code></a> Merge branch 'apply-otg-fixes-stm32f446' of <a href="https://github.com/FLamparski/stm">https://github.com/FLamparski/stm</a>...</li> <li><a href="a34ddd5bca"><code>a34ddd5</code></a> nightlies build: don't remove cargo binary directory</li> <li><a href="85c957e6e9"><code>85c957e</code></a> Merge <a href="https://github-redirect.dependabot.com/stm32-rs/stm32-rs/issues/335">#335</a></li> <li><a href="2e65ff63ac"><code>2e65ff6</code></a> Correct stm32g4 comparator register offsets.</li> <li><a href="7949dec45d"><code>7949dec</code></a> Description typo</li> <li>Additional commits viewable in <a href="https://github.com/stm32-rs/stm32-rs/compare/v0.9.0...v0.10.0">compare view</a></li> </ul> </details> <br /> [](https://dependabot.com/compatibility-score/?dependency-name=stm32h7&package-manager=cargo&previous-version=0.9.0&new-version=0.10.0) Dependabot will resolve any conflicts with this PR as long as you don't alter it yourself. You can also trigger a rebase manually by commenting `@dependabot rebase`. [//]: # (dependabot-automerge-start) [//]: # (dependabot-automerge-end) --- <details> <summary>Dependabot commands and options</summary> <br /> You can trigger Dependabot actions by commenting on this PR: - `@dependabot rebase` will rebase this PR - `@dependabot recreate` will recreate this PR, overwriting any edits that have been made to it - `@dependabot merge` will merge this PR after your CI passes on it - `@dependabot squash and merge` will squash and merge this PR after your CI passes on it - `@dependabot cancel merge` will cancel a previously requested merge and block automerging - `@dependabot reopen` will reopen this PR if it is closed - `@dependabot close` will close this PR and stop Dependabot recreating it. You can achieve the same result by closing it manually - `@dependabot ignore this major version` will close this PR and stop Dependabot creating any more for this major version (unless you reopen the PR or upgrade to it yourself) - `@dependabot ignore this minor version` will close this PR and stop Dependabot creating any more for this minor version (unless you reopen the PR or upgrade to it yourself) - `@dependabot ignore this dependency` will close this PR and stop Dependabot creating any more for this dependency (unless you reopen the PR or upgrade to it yourself) - `@dependabot use these labels` will set the current labels as the default for future PRs for this repo and language - `@dependabot use these reviewers` will set the current reviewers as the default for future PRs for this repo and language - `@dependabot use these assignees` will set the current assignees as the default for future PRs for this repo and language - `@dependabot use this milestone` will set the current milestone as the default for future PRs for this repo and language - `@dependabot badge me` will comment on this PR with code to add a "Dependabot enabled" badge to your readme Additionally, you can set the following in your Dependabot [dashboard](https://app.dependabot.com): - Update frequency (including time of day and day of week) - Pull request limits (per update run and/or open at any time) - Automerge options (never/patch/minor, and dev/runtime dependencies) - Out-of-range updates (receive only lockfile updates, if desired) - Security updates (receive only security updates, if desired) </details> Co-authored-by: dependabot-preview[bot] <27856297+dependabot-preview[bot]@users.noreply.github.com> Co-authored-by: Robert Jördens <rj@quartiq.de>
This commit is contained in:
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commit
05189fe8d2
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@ -294,7 +294,7 @@ dependencies = [
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"serde 1.0.104 (registry+https://github.com/rust-lang/crates.io-index)",
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"serde-json-core 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"smoltcp 0.6.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"stm32h7 0.9.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"stm32h7 0.10.0 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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@ -304,7 +304,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "stm32h7"
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version = "0.9.0"
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version = "0.10.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
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"bare-metal 0.2.5 (registry+https://github.com/rust-lang/crates.io-index)",
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@ -383,7 +383,7 @@ dependencies = [
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"checksum serde_derive 1.0.104 (registry+https://github.com/rust-lang/crates.io-index)" = "128f9e303a5a29922045a830221b8f78ec74a5f544944f3d5984f8ec3895ef64"
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"checksum smoltcp 0.6.0 (registry+https://github.com/rust-lang/crates.io-index)" = "0fe46639fd2ec79eadf8fe719f237a7a0bd4dac5d957f1ca5bbdbc1c3c39e53a"
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"checksum stable_deref_trait 1.1.1 (registry+https://github.com/rust-lang/crates.io-index)" = "dba1a27d3efae4351c8051072d619e3ade2820635c3958d826bfea39d59b54c8"
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"checksum stm32h7 0.9.0 (registry+https://github.com/rust-lang/crates.io-index)" = "6fd678579307324f1890552fe644331ce0a46607f2466aac8609f782d9b26524"
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"checksum stm32h7 0.10.0 (registry+https://github.com/rust-lang/crates.io-index)" = "e5b0045066e082648e8a7ab1dd45c92efa8d7bec2beedf72ac7b62563911f82a"
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"checksum syn 1.0.14 (registry+https://github.com/rust-lang/crates.io-index)" = "af6f3550d8dff9ef7dc34d384ac6f107e5d31c8f57d9f28e0081503f547ac8f5"
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"checksum typenum 1.11.2 (registry+https://github.com/rust-lang/crates.io-index)" = "6d2783fe2d6b8c1101136184eb41be8b1ad379e4657050b8aaff0c79ee7575f9"
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"checksum unicode-xid 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)" = "826e7639553986605ec5979c7dd957c7895e93eabed50ab2ffa7f6128a75097c"
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@ -35,7 +35,7 @@ panic-halt = "0.2"
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serde = { version = "1.0", features = ["derive"], default-features = false }
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heapless = "0.5"
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serde-json-core = "0.1"
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stm32h7 = { version = "0.9", features = ["stm32h743", "rt"] }
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stm32h7 = { version = "0.10", features = ["stm32h743", "rt"] }
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cortex-m-rtfm = "0.5"
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smoltcp = { version = "0.6", features = ["ethernet", "proto-ipv4", "socket-tcp"], default-features = false }
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@ -466,7 +466,7 @@ fn dma1_setup(
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dma1.st[0].par.write(|w| unsafe { w.bits(pa0 as u32) });
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dma1.st[0].m0ar.write(|w| unsafe { w.bits(ma as u32) });
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dma1.st[0].ndtr.write(|w| unsafe { w.ndt().bits(1) });
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dma1.st[0].ndtr.write(|w| w.ndt().bits(1));
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dmamux1.ccr[0].modify(|_, w| w.dmareq_id().tim2_up());
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dma1.st[0].cr.modify(|_, w| unsafe {
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w.pl()
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@ -500,7 +500,7 @@ fn dma1_setup(
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dma1.st[1].par.write(|w| unsafe { w.bits(pa1 as u32) });
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dma1.st[1].m0ar.write(|w| unsafe { w.bits(ma as u32) });
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dma1.st[1].ndtr.write(|w| unsafe { w.ndt().bits(1) });
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dma1.st[1].ndtr.write(|w| w.ndt().bits(1));
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dmamux1.ccr[1].modify(|_, w| w.dmareq_id().tim2_up());
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dma1.st[1].cr.modify(|_, w| unsafe {
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w.pl()
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