391: setup: use a best-effort lock for rprintln r=ryan-summers a=jordens
close#382
* [x] tested with very long log messages that would otherwise cause the DMA deadline to be missed. (use cargo-embed git to make it work with stlink v3)
Co-authored-by: Robert Jördens <rj@quartiq.de>
380: Adding data livestream capability r=ryan-summers a=ryan-summers
This PR implements livestream capability for ADC and DAC samples. The current implementation provides a static configuration.
**TODO**
- [x] Clean up documentation
- [x] Implement streaming for `lockin` app
- [x] Test new block-packetization scheme
- [x] Add reference python stream receiver
- [x] Merge #381 first
Co-authored-by: Ryan Summers <ryan.summers@vertigo-designs.com>
374: rj/miniconf r=jordens a=jordens
- miniconf.py: make retain an option
- miniconf: add some checks, simplify
Co-authored-by: Robert Jördens <rj@quartiq.de>
367: dma: don't swap buffers r=jordens a=jordens
* This uses a new closure-based method to the DMA HAL implementation which
gives access to the inactive buffer directly.
* It removes changing addresses, the third buffer for DBM, the inactive
address poisoning, and allows the cancellation of the redundant repeat
memory barriers and compiler fences.
* This is now around 20 instructions per buffer down from about 100 cycles
before.
* Also introduces a new `SampleBuffer` type alias.
* The required unpacking of the resources structure is a bit annoying
but could probably abstraced away.
* Reduced pounder capture rate to the batch rate using the prescaler.
* Removes the Pounder Timestamper DMA (close#260)
TODO:
* [x] Tested that dual-iir still works
* [x] Tested that DMA overflows are signaled as panics (batch size 1 at full rate)
* [x] Adapt `lockin`
* [x] Tested on FLS without pounder timestamp DMA.
Co-authored-by: Robert Jördens <rj@quartiq.de>
Robert Jördens
bors[bot]
Ryan Summers