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Merge pull request #381 from quartiq/feature/hal-update 

Updating to HAL mainline
master
Ryan Summers 2021-06-15 14:14:57 +02:00 committed by GitHub
parent b0052128e0 3cdef581b8
commit 22381ee703
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 36 additions and 23 deletions
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2
Cargo.lock generated
View File

@ -812,7 +812,7 @@ dependencies = [
[[package]]
name = "stm32h7xx-hal"
version = "0.9.0"
source = "git+https://github.com/quartiq/stm32h7xx-hal.git?rev=b0b8a93#b0b8a930b2c3bc5fcebc2e905b4c5e13360111a5"
source = "git+https://github.com/quartiq/stm32h7xx-hal.git?rev=acd47be#acd47beb4b84b4dc46da3a8b68688bc8c5984604"
dependencies = [
"bare-metal 1.0.0",
"cast",

7
Cargo.toml
View File

@ -52,12 +52,15 @@ mcp23017 = "1.0"
git = "https://github.com/quartiq/rtt-logger.git"
rev = "70b0eb5"
# fast double buffered DMA without poisoning and buffer swapping
# The following modifications of the HAL are being used:
# * fast double buffered DMA without poisoning and buffer swapping
# * Utilize `master` branch of smoltcp
# * Utilize `master` branch of HAL
[dependencies.stm32h7xx-hal]
features = ["stm32h743v", "rt", "unproven", "ethernet", "quadspi"]
# version = "0.9.0"
git = "https://github.com/quartiq/stm32h7xx-hal.git"
rev = "b0b8a93"
rev = "acd47be"
# link.x section start/end
[patch.crates-io.cortex-m-rt]

50
src/hardware/setup.rs
View File

@ -332,7 +332,7 @@ pub fn setup(
.pb10
.into_alternate_af5()
.set_speed(hal::gpio::Speed::VeryHigh);
let _spi_nss = gpiob
let spi_nss = gpiob
.pb9
.into_alternate_af5()
.set_speed(hal::gpio::Speed::VeryHigh);
@ -341,13 +341,15 @@ pub fn setup(
polarity: hal::spi::Polarity::IdleHigh,
phase: hal::spi::Phase::CaptureOnSecondTransition,
})
.manage_cs()
.suspend_when_inactive()
.communication_mode(hal::spi::CommunicationMode::Receiver)
.cs_delay(design_parameters::ADC_SETUP_TIME);
.hardware_cs(hal::spi::HardwareCS {
mode: hal::spi::HardwareCSMode::WordTransaction,
assertion_delay: design_parameters::ADC_SETUP_TIME,
polarity: hal::spi::Polarity::IdleHigh,
})
.communication_mode(hal::spi::CommunicationMode::Receiver);
let spi: hal::spi::Spi<_, _, u16> = device.SPI2.spi(
(spi_sck, spi_miso, hal::spi::NoMosi),
(spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
config,
design_parameters::ADC_DAC_SCK_MAX,
ccdr.peripheral.SPI2,
@ -373,7 +375,7 @@ pub fn setup(
.pc10
.into_alternate_af6()
.set_speed(hal::gpio::Speed::VeryHigh);
let _spi_nss = gpioa
let spi_nss = gpioa
.pa15
.into_alternate_af6()
.set_speed(hal::gpio::Speed::VeryHigh);
@ -382,13 +384,15 @@ pub fn setup(
polarity: hal::spi::Polarity::IdleHigh,
phase: hal::spi::Phase::CaptureOnSecondTransition,
})
.manage_cs()
.suspend_when_inactive()
.communication_mode(hal::spi::CommunicationMode::Receiver)
.cs_delay(design_parameters::ADC_SETUP_TIME);
.hardware_cs(hal::spi::HardwareCS {
mode: hal::spi::HardwareCSMode::WordTransaction,
assertion_delay: design_parameters::ADC_SETUP_TIME,
polarity: hal::spi::Polarity::IdleHigh,
})
.communication_mode(hal::spi::CommunicationMode::Receiver);
let spi: hal::spi::Spi<_, _, u16> = device.SPI3.spi(
(spi_sck, spi_miso, hal::spi::NoMosi),
(spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
config,
design_parameters::ADC_DAC_SCK_MAX,
ccdr.peripheral.SPI3,
@ -424,7 +428,7 @@ pub fn setup(
.pe2
.into_alternate_af5()
.set_speed(hal::gpio::Speed::VeryHigh);
let _spi_nss = gpioe
let spi_nss = gpioe
.pe4
.into_alternate_af5()
.set_speed(hal::gpio::Speed::VeryHigh);
@ -433,13 +437,16 @@ pub fn setup(
polarity: hal::spi::Polarity::IdleHigh,
phase: hal::spi::Phase::CaptureOnSecondTransition,
})
.manage_cs()
.suspend_when_inactive()
.hardware_cs(hal::spi::HardwareCS {
mode: hal::spi::HardwareCSMode::WordTransaction,
assertion_delay: 0.0,
polarity: hal::spi::Polarity::IdleHigh,
})
.communication_mode(hal::spi::CommunicationMode::Transmitter)
.swap_mosi_miso();
device.SPI4.spi(
(spi_sck, spi_miso, hal::spi::NoMosi),
(spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
config,
design_parameters::ADC_DAC_SCK_MAX,
ccdr.peripheral.SPI4,
@ -456,7 +463,7 @@ pub fn setup(
.pf7
.into_alternate_af5()
.set_speed(hal::gpio::Speed::VeryHigh);
let _spi_nss = gpiof
let spi_nss = gpiof
.pf6
.into_alternate_af5()
.set_speed(hal::gpio::Speed::VeryHigh);
@ -465,13 +472,16 @@ pub fn setup(
polarity: hal::spi::Polarity::IdleHigh,
phase: hal::spi::Phase::CaptureOnSecondTransition,
})
.manage_cs()
.hardware_cs(hal::spi::HardwareCS {
mode: hal::spi::HardwareCSMode::WordTransaction,
assertion_delay: 0.0,
polarity: hal::spi::Polarity::IdleHigh,
})
.communication_mode(hal::spi::CommunicationMode::Transmitter)
.suspend_when_inactive()
.swap_mosi_miso();
device.SPI5.spi(
(spi_sck, spi_miso, hal::spi::NoMosi),
(spi_sck, spi_miso, hal::spi::NoMosi, spi_nss),
config,
design_parameters::ADC_DAC_SCK_MAX,
ccdr.peripheral.SPI5,