2019-02-06 17:19:28 +08:00
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#![feature(const_fn)]
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2017-05-04 17:35:26 +08:00
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#![no_std]
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2018-08-29 03:57:17 +08:00
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#![no_main]
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2017-05-04 17:35:26 +08:00
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2019-09-08 07:54:51 +08:00
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use cortex_m_rt::entry;
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2019-08-08 08:23:17 +08:00
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use core::fmt::{self, Write};
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2018-03-26 19:37:14 +08:00
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use smoltcp::time::Instant;
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2019-08-21 17:31:51 +08:00
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use smoltcp::wire::{IpCidr, IpAddress, EthernetAddress};
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2018-01-26 21:03:04 +08:00
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use smoltcp::iface::{NeighborCache, EthernetInterfaceBuilder};
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use smoltcp::socket::{SocketSet, TcpSocket, TcpSocketBuffer};
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2019-09-02 05:56:27 +08:00
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use cortex_m_semihosting::hio;
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2017-05-04 17:35:26 +08:00
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2017-05-11 14:55:00 +08:00
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#[macro_export]
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macro_rules! print {
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($($arg:tt)*) => ({
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use core::fmt::Write;
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write!($crate::UART0, $($arg)*).unwrap()
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})
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}
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#[macro_export]
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macro_rules! println {
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($fmt:expr) => (print!(concat!($fmt, "\n")));
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($fmt:expr, $($arg:tt)*) => (print!(concat!($fmt, "\n"), $($arg)*));
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}
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2018-08-29 03:57:17 +08:00
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#[no_mangle] // https://github.com/rust-lang/rust/issues/{38281,51647}
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#[panic_handler]
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pub fn panic_fmt(info: &core::panic::PanicInfo) -> ! {
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println!("{}", info);
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2017-08-06 19:52:11 +08:00
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loop {}
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}
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2017-05-09 15:57:54 +08:00
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mod board;
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2019-09-08 07:54:51 +08:00
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use self::board::{gpio::Gpio, systick::get_time};
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2017-08-02 00:33:33 +08:00
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mod ethmac;
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2019-08-08 08:08:14 +08:00
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mod ad7172;
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2017-05-06 17:17:41 +08:00
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2017-05-09 13:16:00 +08:00
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pub struct UART0;
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impl fmt::Write for UART0 {
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fn write_str(&mut self, s: &str) -> Result<(), fmt::Error> {
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2018-08-29 03:57:17 +08:00
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let uart_0 = unsafe { &*tm4c129x::UART0::ptr() };
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2017-05-09 13:16:00 +08:00
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for c in s.bytes() {
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2018-08-29 03:57:17 +08:00
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while uart_0.fr.read().txff().bit() {}
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uart_0.dr.write(|w| w.data().bits(c))
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2017-05-09 13:16:00 +08:00
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}
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Ok(())
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}
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}
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2017-08-05 15:51:54 +08:00
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const TCP_RX_BUFFER_SIZE: usize = 256;
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const TCP_TX_BUFFER_SIZE: usize = 8192;
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macro_rules! create_socket_storage {
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($rx_storage:ident, $tx_storage:ident) => (
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let mut $rx_storage = [0; TCP_RX_BUFFER_SIZE];
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let mut $tx_storage = [0; TCP_TX_BUFFER_SIZE];
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)
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}
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macro_rules! create_socket {
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($set:ident, $rx_storage:ident, $tx_storage:ident, $target:ident) => (
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let tcp_rx_buffer = TcpSocketBuffer::new(&mut $rx_storage[..]);
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let tcp_tx_buffer = TcpSocketBuffer::new(&mut $tx_storage[..]);
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let tcp_socket = TcpSocket::new(tcp_rx_buffer, tcp_tx_buffer);
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let $target = $set.add(tcp_socket);
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)
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}
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2019-02-06 17:19:28 +08:00
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#[entry]
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2018-08-29 03:57:17 +08:00
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fn main() -> ! {
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2019-09-02 05:56:27 +08:00
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let mut stdout = hio::hstdout().unwrap();
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2019-09-02 06:01:18 +08:00
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writeln!(stdout, "ionpak boot").unwrap();
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2017-05-09 15:57:54 +08:00
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board::init();
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2019-09-02 06:01:18 +08:00
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writeln!(stdout, "board initialized").unwrap();
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2017-05-04 19:42:22 +08:00
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2017-05-11 14:55:00 +08:00
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println!(r#"
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_ _
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(_) | |
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_ ___ _ __ _ __ __ _| |
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| |/ _ \| '_ \| '_ \ / _` | |/ /
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| | (_) | | | | |_) | (_| | <
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|_|\___/|_| |_| .__/ \__,_|_|\_\
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2017-08-05 15:51:54 +08:00
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"#);
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2019-08-08 07:57:30 +08:00
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// CSn
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2019-08-08 06:54:37 +08:00
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let pb4 = board::gpio::PB4.into_output();
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// SCLK
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let pb5 = board::gpio::PB5.into_output();
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// MOSI
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let pe4 = board::gpio::PE4.into_output();
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// MISO
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let pe5 = board::gpio::PE5.into_input();
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2019-09-02 05:56:45 +08:00
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// max 2 MHz = 0.5 us
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2019-09-08 06:47:41 +08:00
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let mut delay_fn = || for _ in 0..10 { cortex_m::asm::nop(); };
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2019-08-08 06:54:37 +08:00
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let spi = board::softspi::SyncSoftSpi::new(
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2019-08-08 08:08:14 +08:00
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board::softspi::SoftSpi::new(pb5, pe4, pe5),
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&mut delay_fn
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2019-08-08 06:54:37 +08:00
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);
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2019-08-08 08:23:17 +08:00
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let mut adc = ad7172::Adc::new(spi, pb4).unwrap();
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2019-09-02 05:56:45 +08:00
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loop {
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let r = adc.identify();
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match r {
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2019-09-08 05:29:26 +08:00
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Err(e) =>
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writeln!(stdout, "Cannot identify ADC: {:?}", e).unwrap(),
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Ok(id) if id & 0xFFF0 == 0x00D0 => {
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2019-09-02 06:01:18 +08:00
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writeln!(stdout, "ADC id: {:04X}", id).unwrap();
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2019-09-02 05:56:45 +08:00
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break;
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}
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2019-09-08 05:29:26 +08:00
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Ok(id) =>
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writeln!(stdout, "Corrupt ADC id: {:04X}", id).unwrap(),
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};
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}
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2019-09-08 06:47:14 +08:00
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writeln!(stdout, "AD7172: setting checksum mode").unwrap();
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adc.set_checksum_mode(ad7172::ChecksumMode::Crc).unwrap();
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2019-09-08 05:29:26 +08:00
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loop {
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let r = adc.identify();
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match r {
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Err(e) =>
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writeln!(stdout, "Cannot identify ADC: {:?}", e).unwrap(),
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Ok(id) if id & 0xFFF0 == 0x00D0 => {
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writeln!(stdout, "ADC id: {:04X}", id).unwrap();
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break;
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}
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Ok(id) =>
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2019-09-02 05:56:45 +08:00
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writeln!(stdout, "Corrupt ADC id: {:04X}", id).unwrap(),
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};
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}
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2017-08-07 11:18:19 +08:00
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let mut hardware_addr = EthernetAddress(board::get_mac_address());
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if hardware_addr.is_multicast() {
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println!("programmed MAC address is invalid, using default");
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hardware_addr = EthernetAddress([0x10, 0xE2, 0xD5, 0x00, 0x03, 0x00]);
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}
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2019-08-30 04:40:14 +08:00
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let mut ip_addrs = [IpCidr::new(IpAddress::v4(192, 168, 1, 26), 24)];
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2018-01-26 21:03:04 +08:00
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println!("MAC {} IP {}", hardware_addr, ip_addrs[0]);
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let mut neighbor_cache_storage = [None; 8];
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let neighbor_cache = NeighborCache::new(&mut neighbor_cache_storage[..]);
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2018-03-26 20:35:28 +08:00
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let mut device = ethmac::Device::new();
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unsafe { device.init(hardware_addr) };
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let mut iface = EthernetInterfaceBuilder::new(&mut device)
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2018-01-26 21:03:04 +08:00
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.ethernet_addr(hardware_addr)
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.neighbor_cache(neighbor_cache)
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.ip_addrs(&mut ip_addrs[..])
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.finalize();
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2017-08-05 15:51:54 +08:00
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create_socket_storage!(tcp_rx_storage0, tcp_tx_storage0);
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create_socket_storage!(tcp_rx_storage1, tcp_tx_storage1);
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create_socket_storage!(tcp_rx_storage2, tcp_tx_storage2);
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create_socket_storage!(tcp_rx_storage3, tcp_tx_storage3);
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create_socket_storage!(tcp_rx_storage4, tcp_tx_storage4);
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create_socket_storage!(tcp_rx_storage5, tcp_tx_storage5);
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create_socket_storage!(tcp_rx_storage6, tcp_tx_storage6);
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create_socket_storage!(tcp_rx_storage7, tcp_tx_storage7);
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let mut socket_set_entries: [_; 8] = Default::default();
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let mut sockets = SocketSet::new(&mut socket_set_entries[..]);
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create_socket!(sockets, tcp_rx_storage0, tcp_tx_storage0, tcp_handle0);
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create_socket!(sockets, tcp_rx_storage1, tcp_tx_storage1, tcp_handle1);
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create_socket!(sockets, tcp_rx_storage2, tcp_tx_storage2, tcp_handle2);
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create_socket!(sockets, tcp_rx_storage3, tcp_tx_storage3, tcp_handle3);
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create_socket!(sockets, tcp_rx_storage4, tcp_tx_storage4, tcp_handle4);
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create_socket!(sockets, tcp_rx_storage5, tcp_tx_storage5, tcp_handle5);
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create_socket!(sockets, tcp_rx_storage6, tcp_tx_storage6, tcp_handle6);
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create_socket!(sockets, tcp_rx_storage7, tcp_tx_storage7, tcp_handle7);
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2019-08-08 08:23:17 +08:00
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let handles = [
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tcp_handle0,
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tcp_handle1,
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tcp_handle2,
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tcp_handle3,
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tcp_handle4,
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tcp_handle5,
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tcp_handle6,
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tcp_handle7,
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];
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2019-09-08 08:43:01 +08:00
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let mut read_times = [0, 0];
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2019-09-08 05:29:26 +08:00
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let mut data = None;
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// if a socket has sent the latest data
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2019-08-08 08:23:17 +08:00
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let mut socket_pending = [false; 8];
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2017-05-06 12:33:38 +08:00
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loop {
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2019-09-08 08:34:59 +08:00
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let _ = adc.data_ready()
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2019-09-08 05:29:26 +08:00
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.and_then(|channel|
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channel.map(|channel|
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adc.read_data().map(|new_data| {
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2019-09-08 07:24:20 +08:00
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let now = get_time();
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2019-09-08 08:43:01 +08:00
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read_times[0] = read_times[1];
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read_times[1] = now;
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2019-09-08 07:24:20 +08:00
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data = Some((now, Ok((channel, new_data))));
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2019-09-08 05:29:26 +08:00
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for p in socket_pending.iter_mut() {
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*p = true;
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2019-08-08 08:23:17 +08:00
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}
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})
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2019-09-08 05:29:26 +08:00
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).unwrap_or(Ok(()))
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)
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.map_err(|e| {
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2019-09-08 07:24:20 +08:00
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let now = get_time();
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data = Some((now, Err(e)));
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2019-09-08 05:29:26 +08:00
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for p in socket_pending.iter_mut() {
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*p = true;
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}
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2019-08-08 08:23:17 +08:00
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});
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2019-08-21 17:31:51 +08:00
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for (&tcp_handle, pending) in handles.iter().zip(socket_pending.iter_mut()) {
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2018-01-26 21:03:04 +08:00
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let socket = &mut *sockets.get::<TcpSocket>(tcp_handle);
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2017-08-05 15:51:54 +08:00
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if !socket.is_open() {
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2019-08-08 08:23:17 +08:00
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socket.listen(23).unwrap()
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2017-08-05 15:51:54 +08:00
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}
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2019-08-08 08:23:17 +08:00
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if socket.may_send() && *pending {
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2019-09-08 05:29:26 +08:00
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match &data {
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2019-09-08 07:24:20 +08:00
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Some((time, Ok((channel, input)))) => {
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2019-09-08 08:43:01 +08:00
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let interval = read_times[1] - read_times[0];
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let _ = writeln!(socket, "t={}-{} channel={} input={}\r", time, interval, channel, input);
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2019-09-08 05:29:26 +08:00
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}
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2019-09-08 07:24:20 +08:00
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Some((time, Err(ad7172::AdcError::ChecksumMismatch(Some(expected), Some(input))))) => {
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let _ = writeln!(socket, "t={} checksum_expected={:02X} checksum_input={:02X}\r", time, expected, input);
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2019-09-08 05:29:26 +08:00
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}
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2019-09-08 07:24:20 +08:00
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Some((time, Err(e))) => {
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let _ = writeln!(socket, "t={} adc_error={:?}\r", time, e);
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2019-09-08 05:29:26 +08:00
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}
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None => {}
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}
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2019-08-08 08:23:17 +08:00
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*pending = false;
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2017-08-05 15:51:54 +08:00
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}
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2019-08-08 08:23:17 +08:00
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}
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2019-09-08 08:34:59 +08:00
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match iface.poll(&mut sockets, Instant::from_millis((get_time() / 1000) as i64)) {
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2017-09-05 17:26:23 +08:00
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Ok(_) => (),
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2017-08-05 15:51:54 +08:00
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Err(e) => println!("poll error: {}", e)
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}
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2017-05-06 12:33:38 +08:00
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}
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2017-05-04 17:35:26 +08:00
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}
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