dsleung

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-10 12:59:08 +08:00

ff977c0e50 Update README.md

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-10 12:56:28 +08:00

475c1d9fc2 Add SRAI instruction

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-10 12:46:17 +08:00

20a500157b Add attribution to SO in InsnSra.py

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-10 12:35:56 +08:00

9740470c47 Add SRLI instruction

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-10 12:31:32 +08:00

031f335325 Fix SLLI instruction

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-10 12:30:00 +08:00

1fb51e614d Add SLLI instruction

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-10 11:15:13 +08:00

94faa3ba68 Remove redundancy in super() calls

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-07 16:39:23 +08:00

9e64c7ee17 Add RV32I I-Type Instruction (Shift Variation)

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-07 16:06:25 +08:00

1c0541cd12 Document RV32I R-Type Instructions

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-07 15:57:27 +08:00

9bfd155b44 Add AND instruction

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-07 15:54:26 +08:00

07e4c04b26 Add OR instruction

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-07 15:51:29 +08:00

d06daac123 Add SRA instruction

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-07 15:39:54 +08:00

4f7cf5a370 Add SRL instruction

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-07 15:35:48 +08:00

d106ceede7 Add XOR instruction

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-07 15:33:26 +08:00

cab30848e9 Add SLTU instruction

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-07 15:30:01 +08:00

d33dc1b137 Add SLT instruction

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-07 15:25:13 +08:00

44bdff60c8 Add SLL instruction

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-07 14:00:24 +08:00

060dd98919 Add SUB instruction

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-07 13:54:09 +08:00

ccc1bd098b Add ADD instruction

dsleung pushed to restructuring at M-Labs/riscv-formal-nmigen

2020-08-07 13:45:47 +08:00

4f7b11d009 Add RV32I R-Type Instruction