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c7cca11ad1
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update NAC3
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2021-11-11 16:32:37 +08:00 |
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a8129093df
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artiq_run: port to NAC3 (WIP)
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2021-11-10 21:31:03 +08:00 |
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df87cc88d6
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coredevice/ad9912: port to NAC3
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2021-11-10 21:27:06 +08:00 |
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93f24c9f94
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coredevice/urukul: port to NAC3
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2021-11-10 19:01:44 +08:00 |
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31955d0c7a
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coredevice/spi2: port to NAC3
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2021-11-10 17:23:44 +08:00 |
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b7313ddc32
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coredevice/rtio: fix tuple annotation
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2021-11-10 15:32:07 +08:00 |
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262cd62544
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examples/blink_forever: port to NAC3
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2021-11-10 13:59:59 +08:00 |
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2f031285a4
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coredevice/ttl: port to NAC3
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2021-11-10 13:58:54 +08:00 |
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deb8a77464
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coredevice/rtio: port to NAC3
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2021-11-10 13:57:03 +08:00 |
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8f596ed04f
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coredevice: fix typing problems
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2021-11-10 12:37:05 +08:00 |
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c8ebd80fe2
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NAC3 integration WIP
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2021-11-10 12:18:20 +08:00 |
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2f60a38a9c
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flake: update dependencies
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2021-11-10 12:16:29 +08:00 |
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e5620a6b7f
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language: remove old type annotations
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2021-11-03 22:07:44 +08:00 |
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a3543a5527
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bump ARTIQ version number
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2021-11-03 21:51:16 +08:00 |
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9a1a8e0e81
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update dependencies
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2021-11-03 21:49:21 +08:00 |
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977543e05a
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Merge branch 'master' into nac3
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2021-11-03 21:37:18 +08:00 |
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591507a7c0
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Merge pull request #1774 from m-labs/fastino-cic
Fastino cic
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2021-10-28 17:44:20 +02:00 |
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5a5b0cc7c0
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fastino: expand docs
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2021-10-28 15:19:48 +00:00 |
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69cddc6b86
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rtio_clocking: add warnings for unsupported rtio_clock settings (#1773)
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2021-10-28 16:34:22 +08:00 |
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9b1d7e297d
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runtime: clock input specification improvements
closes #1735
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2021-10-28 16:21:51 +08:00 |
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21b07dc667
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flake: fix missing freetype & fontconfig libs for Vivado GUI mode
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2021-10-28 14:39:47 +08:00 |
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1ff474893d
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Revert "fastino: make driver filter order configurable"
This reverts commit 10c37b87ec.
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2021-10-28 06:29:56 +00:00 |
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10c37b87ec
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fastino: make driver filter order configurable
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2021-10-27 20:24:58 +00:00 |
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c940f104f1
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artiq_flash: fix gateware header not in little-endian for RISC-V
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2021-10-25 11:20:26 +08:00 |
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0aa8a739aa
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sayma_rtm: fix RTM firmware not in little-endian for RISC-V
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2021-10-25 11:20:26 +08:00 |
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43eab14f56
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flake: update dependencies
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2021-10-21 15:06:38 +08:00 |
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cc15a4f572
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flake: update Vivado
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2021-10-21 11:24:55 +08:00 |
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df6aeb99f6
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flake: check gateware timing
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2021-10-18 11:09:10 +08:00 |
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bb61f2dae6
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flake: update dependencies
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2021-10-18 10:38:28 +08:00 |
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b0cbad530b
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flake: update dependencies
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2021-10-16 19:10:28 +08:00 |
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92cdfac35a
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flake: fix cargoDeps sha256
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2021-10-16 18:20:25 +08:00 |
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bf180c168c
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flake.lock: update dependencies
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2021-10-16 17:42:24 +08:00 |
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d5fa3d131a
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cargo.lock: update libc version for libfringe
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2021-10-16 17:42:24 +08:00 |
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6d3164a912
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riscv: print mtval on panic
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2021-10-16 17:42:24 +08:00 |
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46326716fd
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runtime: bump libfringe, impl ecall abi
See libfringe PR: M-Labs/libfringe#1
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2021-10-16 17:42:24 +08:00 |
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0a59c889de
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satman/kern: init locked PMP on startup
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2021-10-16 17:42:24 +08:00 |
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27a7a96626
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runtime: setup pmp + transfer to user
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2021-10-16 17:42:24 +08:00 |
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a0bf11b465
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riscv: impl pmp
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2021-10-16 17:42:24 +08:00 |
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790a20edf6
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linker: generate stack guard + symbol
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2021-10-16 17:42:24 +08:00 |
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fanmingyu212
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178a86bcda
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master: add an argument to set an experiment subdirectory
Signed-off-by: Mingyu Fan <mingyufan@ucsb.edu>
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2021-10-15 16:54:31 +08:00 |
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fbd5c70250
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Revert "runtime: expose rint from libm"
Consistency with NAR3/Zynq where rint is not available.
This reverts commit f5100702f6.
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2021-10-11 08:12:58 +08:00 |
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35d21c98d3
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Revert "runtime: expose rint from libm"
Consistency with NAR3/Zynq where rint is not available.
This reverts commit f5100702f6.
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2021-10-11 08:12:04 +08:00 |
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17c283d091
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runtime: expose rint from libm
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2021-10-10 20:40:56 +08:00 |
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f5100702f6
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runtime: expose rint from libm
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2021-10-10 20:40:17 +08:00 |
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3c1cbf47d2
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phaser: add more slack during init. Closes #1757
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2021-10-10 16:18:55 +08:00 |
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3f6bf33298
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fastino: add interpolator support
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2021-10-08 15:47:07 +00:00 |
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501eb1fa23
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flake: add microscope
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2021-10-08 12:39:35 +08:00 |
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ea9bc04407
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flake: add jesd204b
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2021-10-08 12:39:35 +08:00 |
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97909d7619
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remove old compiler, add nac3 dependency (WIP)
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2021-10-08 00:30:27 +08:00 |
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59065c4663
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alloc_list: support alloc w/ large align
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
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2021-10-07 12:38:03 +08:00 |
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