2
0
mirror of https://github.com/m-labs/artiq.git synced 2024-12-30 21:53:34 +08:00
Commit Graph

25 Commits

Author SHA1 Message Date
1ed808e848 soc/target: share base PPro design with MiSoC 2014-08-03 12:26:15 +08:00
9e4bc35354 soc/rtio: input support 2014-07-25 16:23:35 -06:00
6b6b44b924 soc/rtio: mux OE 2014-07-25 11:09:26 -06:00
f03ae5e5b0 soc/rtio: separate PHY, add OE and fine timestamp in FIFO 2014-07-24 23:50:20 -06:00
f390e9a7d1 corecom_serial: add CRC for kernel 2014-07-23 19:12:22 -06:00
06cc9302f8 soc/runtime: fix DDS programming 2014-07-23 17:10:49 -06:00
ba088614d8 runtime: add dds_program 2014-07-23 11:49:48 -06:00
005d66c7cd soc/dds: fix timing 2014-07-22 17:44:41 -06:00
2358b218bf soc: add DDS interface core 2014-07-22 11:37:53 -06:00
dec7c1438f runtime: implement rtio_sync syscall 2014-07-22 11:36:54 -06:00
5573cf3688 soc: add tester IO 2014-07-22 10:45:59 -06:00
cdda1beea8 soc/rtio: refactor, share counter and underflow detector 2014-07-21 13:17:21 -06:00
ede3667fd3 soc/target: use only 8 TTL channels for now 2014-07-20 18:38:41 -06:00
043c4345e5 soc/runtime: add RTIO support 2014-07-20 18:28:56 -06:00
5f58789592 rtio: fix FIFO WE 2014-07-20 18:22:53 -06:00
0cb18d58a8 rtio: add FIFO level CSR 2014-07-17 19:35:53 -06:00
3b4bb41a19 add basic output-only untested RTIO core 2014-07-16 19:13:11 -06:00
17fab6f024 corecom_serial: support ident and runtime environment creation 2014-07-15 11:21:31 -06:00
bb4a992907 runtime: implement RPC syscall 2014-07-07 19:13:43 +02:00
a03a60b90e Variadic function demo 2014-07-06 21:06:53 +02:00
5570d45acb runtime: run kernel just once 2014-07-05 22:47:23 +02:00
301b7d51fa add gpio_out syscall 2014-07-05 22:46:43 +02:00
d804f1199e soc: add LED 2014-07-05 22:44:20 +02:00
a08c6d4410 runtime: support regular function calls from the kernel 2014-07-05 19:39:49 +02:00
6072f0c42f Basic SoC and runtime design 2014-07-04 17:49:08 +02:00