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corecom_serial: add CRC for kernel

This commit is contained in:
Sebastien Bourdeauducq 2014-07-23 19:12:22 -06:00
parent 06cc9302f8
commit f390e9a7d1
2 changed files with 13 additions and 4 deletions
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6
artiq/devices/corecom_serial.py
View File

@ -1,4 +1,4 @@
import os, termios, struct
import os, termios, struct, zlib
from enum import Enum
from artiq.language import units
@ -78,8 +78,8 @@ class CoreCom:
return Environment(ref_period*units.ps)
def run(self, kcode):
_write_exactly(self.port, struct.pack(">lbl",
0x5a5a5a5a, _MsgType.LOAD_KERNEL.value, len(kcode)))
_write_exactly(self.port, struct.pack(">lblL",
0x5a5a5a5a, _MsgType.LOAD_KERNEL.value, len(kcode), zlib.crc32(kcode)))
_write_exactly(self.port, kcode)
(reply, ) = struct.unpack("b", _read_exactly(self.port, 1))
if reply != 0x4f:

11
soc/runtime/main.c
View File

@ -2,6 +2,7 @@
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include <crc.h>
#include <irq.h>
#include <uart.h>
@ -81,6 +82,7 @@ static void send_sync(void)
static int ident_and_download_kernel(void *buffer, int maxlength)
{
int length;
unsigned int crc;
int i;
char msgtype;
unsigned char *_buffer = buffer;
@ -93,10 +95,17 @@ static int ident_and_download_kernel(void *buffer, int maxlength)
send_int(1000000000000LL/identifier_frequency_read()); /* RTIO clock period in picoseconds */
} else if(msgtype == MSGTYPE_LOAD_KERNEL) {
length = receive_int();
if(length > maxlength)
if(length > maxlength) {
send_char(0x4c); /* Incorrect length */
return -1;
}
crc = receive_int();
for(i=0;i<length;i++)
_buffer[i] = receive_char();
if(crc32(buffer, length) != crc) {
send_char(0x43); /* CRC failed */
return -1;
}
send_char(0x4f); /* kernel reception OK */
return length;
} else