2
0
mirror of https://github.com/m-labs/artiq.git synced 2024-12-05 01:36:39 +08:00
Commit Graph

7631 Commits

Author SHA1 Message Date
b2480f0edc artiq_flash: update actions documentation 2019-12-21 14:18:28 +08:00
d4e039cede basemod: add coredevice driver 2019-12-21 14:18:10 +08:00
106d25b32a kasli_sawgmaster: fix drtio_is_up 2019-12-21 14:17:52 +08:00
8759c8d360 shiftreg: fix get method 2019-12-21 14:17:22 +08:00
c3030f4ffb kasli_sawgmaster: update device_db for BaseMod 2019-12-20 19:59:15 +08:00
cab8c8249e coredevice/shiftreg: add get method 2019-12-20 18:58:50 +08:00
b7f1623197 sayma_rtm: connect attenuator shift registers in series 2019-12-20 18:58:31 +08:00
c5137eeb62 firmware: remove legacy hmc542 code 2019-12-20 15:25:55 +08:00
1c9cbe6285 sayma_rtm: add basemod attenuators on RTIO 2019-12-20 15:25:55 +08:00
David Nadlinger
8f518c6b05 compiler: Allow None in type hints
Similar to how Python itself interprets None as type(None),
make it translate to TNone in ARTIQ compiler type hints.
2019-12-19 09:36:45 +08:00
David Nadlinger
594ff45750 compiler: Revert support for None as TNone
This was mistakenly included in fb2b634c4a, and broke the test
case verifying that using None as an ARTIQ type annotation in fact
generates an error message.
2019-12-18 13:23:40 +00:00
David Nadlinger
fb2b634c4a compiler, language: Implement @kernel_from_string
With support for polymorphism (or type erasure on pointers to
member functions) being absent in the ARTIQ compiler, code
generation is vital to be able to implement abstractions that
work with user-provided lists/trees of objects with uniform
interfaces (e.g. a common base class, or duck typing), but
different concrete types.

@kernel_from_string has been in production use for exactly
this use case in Oxford for the better part of a year now
(various places in ndscan).

GitHub: Fixes #1089.
2019-12-18 10:51:04 +08:00
6ee15fbcae sayma_rtm: basemod RF switches 2019-12-18 10:33:29 +08:00
David Nadlinger
d3508b014f firmware: Add whitespace between panic handler location and message 2019-12-17 19:59:59 +00:00
David Nadlinger
0279a60a55 examples: Add README
This will be displayed by GitHub below the directory listing, and was
inspired by observing new users disregard the examples/ tree entirely
(even though the experiments and device DBs within would have cleared
up their getting-started confusion) due to the perceived complexity
wall induced by the wealth of subdirectories.
2019-12-17 13:35:19 +00:00
5fefdcc324 manual: clarify XY applet setup example 2019-12-15 10:41:58 +08:00
8d13aeb96c test: run test_help for browser and dashboard 2019-12-12 10:34:58 +08:00
ac09f3a5da artiq_browser: fix command line argument handling. Closes #1404 2019-12-11 16:18:56 +08:00
52112d54f9 kasli_generic: expose peripheral_processors dictionary. Closes #1403 2019-12-10 10:30:06 +08:00
6f52540569 wrpll: fix previous commit 2019-12-09 20:13:55 +08:00
13486f3acf wrpll: swap helper/main si549 frequencies 2019-12-09 19:49:34 +08:00
150a02117c sayma_rtm: drive clk_src_ext_sel 2019-12-09 19:47:50 +08:00
307a6ca140 gth_ultrascale: make OBUFDS_GTE3 work
https://www.xilinx.com/support/answers/67919.html
2019-12-09 18:13:22 +08:00
f7a5df8d81 wrpll: add diagram from Weida 2019-12-09 17:41:44 +08:00
4919fb8765 wrpll: print DDMTD helper tags 2019-12-09 17:39:22 +08:00
0d4eccc1a5 wrpll: improve debug output 2019-12-09 17:23:09 +08:00
f633c62e8d wrpll: speed up si549 i2c access 2019-12-09 17:22:58 +08:00
14e09582b6 wrpll: work around si549 not working when lsdiv=2 2019-12-09 16:20:08 +08:00
439576f59d wrpll: fix Si549 initialization delays 2019-12-09 16:13:57 +08:00
2b5213b013 wrpll: constrain clocks 2019-12-09 12:26:44 +08:00
05e2e1899a wrpll: update OBUFDS_GTE2 comment
Seems O can fan out simultaneously to transceiver and fabric.
Kasli is using ODIV2 for no particular reason.
2019-12-09 11:58:54 +08:00
4148efd2ee wrpll: implement filters and connect to Si549 2019-12-09 11:47:29 +08:00
d43fe644f0 wrpll: stabilize DDMTDSamplerGTP 2019-12-09 11:47:14 +08:00
0499f83580 wrpll: helper clock sanity check 2019-12-08 23:46:33 +08:00
46a776d06e sayma: introduce WRPLL on RTM 2019-12-08 15:30:00 +08:00
f35f658bc5 artiq_flash: rework RTM management 2019-12-08 15:29:31 +08:00
bcd061f141 artiq_flash: RTM is a regular DRTIO satellite, can be used with all variants 2019-12-08 15:12:04 +08:00
883310d83e sayma_rtm: si5324 -> cdrclkc 2019-12-08 14:26:05 +08:00
57a5bea43a sayma_rtm: support setting RTIO frequency 2019-12-08 11:45:31 +08:00
da9237de53 wrpll: support differential DDMTD inputs 2019-12-07 18:18:57 +08:00
Paweł Kulik
3851a02a3a Added option of flashing only RTM gateware.
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2019-12-07 09:31:19 +08:00
Paweł Kulik
14e250c78f Enabled internal pullup for CML SYSREF outputs, otherwise there is no signal on them.
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2019-12-07 09:30:24 +08:00
7098854b0f wrpll: share DDMTD counter 2019-12-04 19:05:56 +08:00
05c5fed07d suservo: stray comma 2019-12-03 08:38:07 +00:00
56074cfffa suservo: support operating with one urukul
implemented by wiring up the second Urukul to dummy pins

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-12-02 11:30:20 +01:00
86e1924493 kasli_generic: support external reference on masters 2019-11-30 07:34:41 +00:00
eb271f383b wrpll: add DDMTD cores 2019-11-28 22:03:50 +08:00
39d5ca11f4 si549: increase I2C frequency 2019-11-28 22:03:26 +08:00
87894102e5 si549: use recommended i2c read sequence 2019-11-28 17:49:02 +08:00
2e55e39ac7 wrpll: use spaces to indent 2019-11-28 17:40:25 +08:00