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731 Commits

Author SHA1 Message Date
Spaqin 35f30ddf05
Expose TTLClockGen for Kasli JSONs (#1886) 2022-05-06 13:33:42 +08:00
Sebastien Bourdeauducq 80d412a8bf support submitting experiments by content 2022-03-20 12:58:55 +08:00
Sebastien Bourdeauducq 922d2b1619 drop support for big-endian moninj 2022-03-19 22:58:31 +08:00
Sebastien Bourdeauducq 6d92e539b1 artiq_ddb_template: add aqctl_moninj_proxy 2022-03-19 22:33:03 +08:00
Sebastien Bourdeauducq d3073022ac aqctl_moninj_proxy: fix all major bugs 2022-03-19 19:06:12 +08:00
Sebastien Bourdeauducq bbb2c75194 add aqctl_moninj_proxy 2022-03-18 17:02:50 +08:00
Spaqin a85b4d5f5e
I2C API for PCA9547 support (#1860) 2022-03-01 15:07:53 +08:00
Leon Riesebos c4292770f8
Kasli JSON description for SPI over DIO cards (#1800) 2022-02-26 07:36:00 +08:00
Steve Fan ad656d1e53
dashboard: add device database reload action in context menu (#1853) 2022-02-22 16:18:27 +08:00
Mike Birtwell a106ed0295
artiq_flash: don't try to make rtm_binary_dir if binary_dir unset (#1851) 
Signed-off-by: Michael Birtwell <michael.birtwell@oxionics.com>
 2022-02-18 18:54:17 +08:00
Sebastien Bourdeauducq 65eab31f23 simplify board package format and artiq_flash 2022-02-14 15:54:17 +08:00
Sebastien Bourdeauducq b893d97d7b afws_client: add login successful message 2022-02-08 21:52:48 +08:00
Sebastien Bourdeauducq b6f5ba8b5b afws_client: improve error message when output already exists 2022-02-08 21:26:12 +08:00
Sebastien Bourdeauducq cc69482dad afws: nix requires full Git commit hash 2022-02-08 21:05:39 +08:00
Sebastien Bourdeauducq 833acb6925 add AFWS client 2022-02-07 14:28:00 +08:00
occheung d5eec652ee tester: specify att with dB 2022-02-07 14:22:52 +08:00
Spaqin 095fb9e333
add Almazny support (#1780) 2022-01-11 09:55:39 +08:00
occheung 61349f9685 sinara_tester: fix outdated API 2022-01-10 17:23:28 +08:00
Sebastien Bourdeauducq 9e5e234af3 stop using explicit ProactorEventLoop on Windows 
It is now the default in Python.
 2021-12-14 20:06:38 +08:00
Sebastien Bourdeauducq 6a433b2fce artiq_sinara_tester: test Urukul attenuator digital control 2021-11-24 18:57:16 +08:00
Harry Ho b49f813b17 artiq_flash: ignore checking non-RTM artifacts if unused 2021-11-18 16:59:32 +08:00
Peter Drmota 20e079a381
AD9910 driver feature extension and SUServo IIR readability (#1500) 
* coredevice.ad9910: Add set_cfr2 function and extend arguments of set_cfr1 and set_sync

* SUServo: Wrap CPLD and DDS devices in a list

* SUServo: Refactor [nfc]

Co-authored-by: drmota <peter.drmota@physics.ox.ac.uk>
Co-authored-by: David Nadlinger <code@klickverbot.at>
 2021-11-15 12:09:16 +08:00
occheung 750b0ce46d ddb_temp: select appropriate compiler target 2021-11-08 16:59:08 +08:00
Harry Ho c940f104f1 artiq_flash: fix gateware header not in little-endian for RISC-V 2021-10-25 11:20:26 +08:00
fanmingyu212 178a86bcda master: add an argument to set an experiment subdirectory 
Signed-off-by: Mingyu Fan <mingyufan@ucsb.edu>
 2021-10-15 16:54:31 +08:00
Etienne Wodey a8333053c9 sinara_tester: add device_db and test selection CLI options 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-27 17:44:50 +08:00
Sebastien Bourdeauducq 43d120359d compiler: switch to upstream llvmlite and RISC-V target 2021-09-10 13:25:12 +08:00
Leon Riesebos 2cf144a60c ddb_template: edge counter keys correspond with according ttl keys 
previously ttl_counter_0 and ttl_0 could be on completely different physical ttl output channels
with this change, ttl_0_counter (note the changed key format) is always on the same channel as ttl_0

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-09-06 09:06:04 +08:00
SingularitySurfer 65f63e6927 fix suservo start 2021-08-19 07:38:48 +00:00
Robert Jördens a53162d01d tester: tweak suservo 
* p gain 1 to get reasonable power
* refine testing instructions and comments
 2021-08-19 09:17:14 +02:00
SingularitySurfer 4d21a72407 Implement SUServo tester. 2021-08-18 15:10:27 +00:00
Mikołaj Sowiński 898122f3e5
Added support for HVAMP_8CH (#1741) 2021-08-16 13:39:00 +08:00
Sebastien Bourdeauducq 477b1516d3 remove profiler 2021-08-12 12:51:55 +08:00
Sebastien Bourdeauducq 67847f98f4 artiq_run: fix multiarch 2021-08-12 12:48:10 +08:00
Star Chen 6b88ea563d
talk to ICAP primitive to restart gateware (#1733) 2021-08-05 17:00:31 +08:00
Sebastien Bourdeauducq 53a98acfe4 artiq_flash: cleanup openocd handling, do not follow symlinks 
Not following symlinks allows files to be added to OpenOCD via nixpkgs buildEnv.
 2021-07-26 17:01:24 +08:00
Sebastien Bourdeauducq 4fb8ea5b73 artiq_flash: determine which firmware to flash by looking at filesystem 
Closes #1719
 2021-07-14 16:43:00 +08:00
Star Chen 9dee8bb9c9
Kasli: Added front panel user LED (#1623) (#1694) 2021-06-07 16:05:50 +08:00
pca006132 bcb030cc9c
aqctl_corelog: fix endianness issue (closes #1682) (#1689) 
Fixed according to
https://forum.m-labs.hk/d/190-fetchingreading-the-core-log-in-a-central-location/10

Tested with both KC705 and ZC706.
 2021-06-03 14:06:17 +08:00
Sebastien Bourdeauducq ea1dd2da43 artiq_ddb_template: kasli-soc support 2021-05-30 20:33:44 +08:00
Sebastien Bourdeauducq 935e18c1be artiq_flash: improve openocd not found error message 2021-05-13 14:45:23 +08:00
Leon Riesebos 2671c271d4 ad99xx unified type annotations for cfg_sw() methods and fixed test cases 
closes #1642

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-04-21 11:29:55 +08:00
Harry Ho 75efb8985c ddb_template: mirny_cpld: accept clk_sel as a string 2021-03-29 17:49:43 +08:00
Etienne Wodey 78e1b9f8e5 sinara_tester/mirny: remove hw_rev checking fixup code 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-01-29 18:47:40 +01:00
Sebastien Bourdeauducq c675488a99 reorganize JSON schema files 2021-01-16 10:43:14 +08:00
Astro c6807f4594 kasli_generic: validate description against schema, use defaults from schema 2021-01-16 10:35:23 +08:00
occheung 6a5f5088e2 frontend: sinara_tester: add mirny test 
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
 2021-01-05 17:01:01 +08:00
occheung a017dafee6 ddb_template: mirny_cpld: add default value 
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
 2020-12-15 11:00:59 +08:00
occheung 3f631c417d artiq_ddb_template: mirny_cpld: add refclk, clk_sel args 
Signed-off-by: occheung <occheung@connect.ust.hk>
 2020-12-14 13:38:20 +08:00
occheung 33d39b261a artiq_ddb_template: mirny_cpld: rename adf5355 to adf5356 
Signed-off-by: occheung <occheung@connect.ust.hk>
 2020-12-14 13:38:20 +08:00