whitequark
3378dd57b8
Fold llvmlite patches into m-labs/llvmlite repository.
2015-07-29 13:54:00 +03:00
whitequark
fd46d8b11e
Merge branch 'master' into new-py2llvm
2015-07-29 12:52:19 +03:00
whitequark
c40ae9dbd3
MiSoC is not built with -fPIC anymore, remove support code for that.
2015-07-29 12:40:46 +03:00
Robert Jördens
ebbbdcf194
examples/tdr: cleanup
2015-07-28 23:30:26 -06:00
Robert Jördens
278570faf6
examples: add TDR toy example
2015-07-28 21:36:10 -06:00
Sebastien Bourdeauducq
90368415a6
ttl: remove timestamp function
...
The general idea is that functions that work with absolute timestamps exist only in machine units versions, to help prevent floating point losses of precision. Time differences should be computed in machine units and then converted, e.g. mu_to_seconds(t2-t1).
This function would have had problems after ~50 days of running the device.
2015-07-29 11:11:16 +08:00
Robert Jördens
2640a57af3
test/coredevice: let output() settle longer
2015-07-28 16:20:05 -06:00
Robert Jördens
5f5227f01f
ttl: add timestamp()
2015-07-28 16:20:05 -06:00
Robert Jördens
e95b66f114
ttl: remove spurious _mu
2015-07-28 16:20:05 -06:00
whitequark
b179430f6b
Specify correct llvmlite branch in installation instructions.
2015-07-28 23:43:07 +03:00
Robert Jördens
67715f0d2e
pipistrello: only put serdes on the lower ttls
...
this setup is getting a bit power hungry.
pmt0, 1 (rtio channels 0, 1): 4x in and out
ttl0, 1 (rtio channels 2, 3): 4x out
ttl2 (rtio channel 4): 8x out
2015-07-28 12:54:31 -06:00
Robert Jördens
fb339d294e
serdes_s6: no need to reset
2015-07-28 12:54:31 -06:00
Robert Jördens
9dfbf07743
pipistrello: use 4x serdes for rtio ttl
...
pipistrello: do not wait for lock on startup
LCK_cycle:6 was added in 6a412f796e1 (mibuild). It waits for _all_
DCM and PLLs to lock (probably irrespective of STARTUP_WAIT).
2015-07-28 12:54:27 -06:00
Sebastien Bourdeauducq
8e391e2661
kc705: generate 10MHz clock on GPIO SMA
...
For SynthNV and input tests.
2015-07-28 18:56:47 +08:00
Robert Jördens
1809a70f5c
Revert "pipistrello: use 4x serdes for rtio ttl"
...
This reverts commit 8e92cc91f5
.
Broken. Will revisit.
2015-07-27 23:39:35 -06:00
Robert Jördens
f0a7078336
Revert "rtiocrg.c: pipistrello also has pll_reset"
...
This reverts commit bdee914828
.
2015-07-27 22:18:45 -06:00
Robert Jördens
bdee914828
rtiocrg.c: pipistrello also has pll_reset
2015-07-27 22:14:42 -06:00
Robert Jördens
e95b06e96d
pipistrello: tie unused dds.p low
2015-07-27 21:48:56 -06:00
Robert Jördens
8e92cc91f5
pipistrello: use 4x serdes for rtio ttl
2015-07-27 21:29:50 -06:00
Robert Jördens
9ac5bc52d4
rtio: add spartan6 serdes, 4x and 8x
2015-07-27 21:01:15 -06:00
Sebastien Bourdeauducq
ae3a52c49c
runtime: fix KERNELCPU_PAYLOAD_ADDRESS
2015-07-28 02:12:14 +08:00
whitequark
eec4a2d2d2
Update buildsystem to track -fPIC and ranlib removal in MiSoC.
2015-07-27 21:10:46 +03:00
Sebastien Bourdeauducq
0cd74533ca
runtime: more explicit message about startup clock failure
2015-07-28 00:38:38 +08:00
Sebastien Bourdeauducq
228f7c3d61
manual: update xc3sprog download
2015-07-28 00:38:20 +08:00
Sebastien Bourdeauducq
7feaca7c7c
runtime: allow selecting external clock at startup
2015-07-28 00:19:07 +08:00
Sebastien Bourdeauducq
09d837e4ba
runtime: monitor RTIO clock status
2015-07-28 00:05:24 +08:00
Sebastien Bourdeauducq
299bc1cb7e
kc705: output divided-by-2 RTIO clock
2015-07-27 20:46:44 +08:00
Sebastien Bourdeauducq
256e99f0d7
kc705: crg cleanup
2015-07-27 20:31:37 +08:00
Sebastien Bourdeauducq
2a95e866aa
kc705: use 8X SERDES RTIO PHY
2015-07-27 20:12:17 +08:00
Sebastien Bourdeauducq
fe57308e71
runtime: support for RTIO PLL
2015-07-27 20:11:31 +08:00
whitequark
244ace19e1
Add artiq_raise_from_c macro.
2015-07-27 13:56:18 +03:00
whitequark
edffb40ef2
On uncaught exception, execute finally clauses and collect backtrace.
2015-07-27 13:51:24 +03:00
whitequark
2939d4f0f3
Add tests for finally clause and reraising.
2015-07-27 12:36:21 +03:00
whitequark
a83e7e2248
Add tests for exceptional control flow.
2015-07-27 10:22:28 +03:00
whitequark
90be44c596
Add tests for non-exceptional control flow across finally.
2015-07-27 10:13:22 +03:00
whitequark
7c77dd317a
Implement __artiq_personality.
2015-07-27 09:10:20 +03:00
Sebastien Bourdeauducq
d7138b25f2
examples/ddb: add device aliases for unittests
2015-07-27 12:22:56 +08:00
Sebastien Bourdeauducq
b1d58bd4c8
rtio: fix replace/sequence_error when fine_ts_width > 0
2015-07-27 12:22:35 +08:00
Sebastien Bourdeauducq
959b7a7b46
rtio: resetless -> reset_less
2015-07-27 11:46:56 +08:00
Sebastien Bourdeauducq
117b361a06
Merge branch 'master' of github.com:m-labs/artiq
2015-07-27 11:42:29 +08:00
Sebastien Bourdeauducq
3573fd02a6
targets/kc705: add TIG constraints for ISE
2015-07-27 10:58:19 +08:00
Sebastien Bourdeauducq
fe6a5c42df
rtio: remove unused clk_freq argument
2015-07-27 10:57:15 +08:00
Sebastien Bourdeauducq
5b50f5fe05
rtio/ttl_serdes_7series: use recommended OSERDES T configuration
2015-07-27 10:50:50 +08:00
Sebastien Bourdeauducq
d3f05e414a
runtime: account for RTIO_FINE_TS_WIDTH in time buffers
2015-07-27 10:50:25 +08:00
whitequark
bb5fe60137
Implement exception raising.
2015-07-27 05:46:43 +03:00
whitequark
ef4a06a270
Merge branch 'master' into new-py2llvm
2015-07-27 04:57:32 +03:00
whitequark
905abd6e27
get-toolchain.sh: be less verbose.
2015-07-27 04:57:13 +03:00
whitequark
47f13bf921
Always load the personality library in JIT testbench, if available.
2015-07-27 04:44:40 +03:00
whitequark
14c7b15785
Add a test harness for exceptions.
...
The libunwind.h is duplicated here so that it would be possible
to test the Python parts without pulling in misoc.
2015-07-27 04:18:12 +03:00
whitequark
862ac1f90d
lit-test/compiler -> lit-test/test.
...
Other directories in lit-test will host various parts of
the test harness.
2015-07-27 04:13:29 +03:00