|
|
26a11a296c
|
sayma_rtm: drive DAC control signals
|
2017-08-26 16:57:02 -07:00 |
|
|
|
d609c67cbd
|
sayma_rtm: set clock mux pins
|
2017-08-26 16:48:10 -07:00 |
|
|
|
9194402ea5
|
sayma_rtm: expose HMC SPI bus
|
2017-08-26 16:31:31 -07:00 |
|
|
|
dbc12540da
|
sayma_amc: register RTM CSR regions from CSV
|
2017-08-26 14:48:11 -07:00 |
|
|
|
54c75d3274
|
sayma_rtm: use CSR infrastructure, generate CSR CSV
|
2017-08-23 17:19:53 -04:00 |
|
|
|
668450db26
|
sayma_amc: add serwb
|
2017-08-21 18:11:29 -04:00 |
|
|
|
0459a70cf6
|
sayma_amc: cleanup, fix RTM UART forwarding
|
2017-08-21 16:49:42 -04:00 |
|
|
|
1f2b373d09
|
sayma_rtm: remove unnecessary serwb_control
|
2017-08-21 16:37:13 -04:00 |
|
|
|
bfea297279
|
targets: add Sayma RTM
|
2017-08-21 15:58:01 -04:00 |
|
|
|
53c7f92fdc
|
serwb: add __init__.py and expose submodules
|
2017-08-21 15:57:43 -04:00 |
|
|
|
dac3a78b75
|
serwb: style, use migen, fix imports
|
2017-08-21 12:35:59 -04:00 |
|
Florent Kermarrec
|
da90a0fa12
|
Add test for Etherbone
Files copied directly from https://github.com/enjoy-digital/sayma_test @ 9ec62242659910ad1726beb00ff15b3f0a406615
|
2017-08-21 12:31:49 -04:00 |
|
Florent Kermarrec
|
44dc76e42e
|
Add serial Wishbone bridge
Files copied directly from https://github.com/enjoy-digital/sayma_test @ 9ce2cba87896d056819dc2edc54f0453a86162c3
|
2017-08-21 12:22:05 -04:00 |
|
|
|
d6b624dfbe
|
sayma_amc: connect RTM serial and second serial
|
2017-08-20 19:01:55 -04:00 |
|
|
|
e94d0803e1
|
artiq_flash: fix Sayma load addresses
|
2017-08-20 18:21:36 -04:00 |
|
|
|
261b6fb42e
|
artiq_flash: fix AMC_DR_LEN
|
2017-08-20 18:20:51 -04:00 |
|
|
|
9f4c9fc14b
|
artiq_flash: Sayma support
|
2017-08-20 17:23:56 -04:00 |
|
|
|
bee4902323
|
add Sayma AMC standalone target
|
2017-08-20 11:47:45 -04:00 |
|
|
|
ac83bfbd8e
|
runtime: add support for targets without SPI flash
|
2017-08-20 11:28:57 -04:00 |
|
|
|
1dab7df846
|
kc705_sma_spi: fix permissions
|
2017-08-20 10:54:24 -04:00 |
|
|
|
2a91b6996f
|
doc: update proxy bitstream url
|
2017-08-15 14:34:27 -06:00 |
|
|
|
34ddda7a0c
|
conda: use single-tap proxy bitstreams
|
2017-08-15 14:30:53 -06:00 |
|
|
|
8459cfe8db
|
firmware: remove unnecessary git_describe rust-cfg
|
2017-08-15 08:14:17 -06:00 |
|
mntng
|
ea135f9d06
|
add unittest for artiq_compile and ELF artiq_run (#455)
|
2017-08-15 08:13:11 -06:00 |
|
|
|
cf1de4b26a
|
test_spi: convert to Unix EOL
|
2017-08-04 11:48:20 +08:00 |
|
|
|
7085c1cccb
|
RELEASE_NOTES: clarify time/date
|
2017-08-03 13:56:15 +02:00 |
|
|
|
bc2d9ef818
|
Merge pull request #809 from cjbe/epoch_time
master: use epoch time for timestamps (closes #726)
|
2017-08-03 12:55:23 +02:00 |
|
|
|
dd6c48fed2
|
Merge branch 'master' into epoch_time
|
2017-08-03 12:55:01 +02:00 |
|
|
|
cc289dd3a0
|
master: store run_time and start_time as doubles
|
2017-08-03 10:41:57 +01:00 |
|
|
|
c3e462ba4b
|
Merge pull request #808 from cjbe/timed_log_rotation
master: rotate logs at midnight, rather than on log size
|
2017-08-03 11:40:49 +02:00 |
|
|
|
223501f811
|
master: use epoch time for timestamps (closes #726)
|
2017-08-03 10:30:31 +01:00 |
|
|
|
eabca1f311
|
master: correct example datestring in help
|
2017-08-03 10:12:52 +01:00 |
|
|
|
810bb69989
|
master: rotate logs at midnight, rather than on log size
|
2017-08-03 00:31:04 +01:00 |
|
|
|
2998372d08
|
browser,dashboard: delete MDI subwindows when they are closed
|
2017-07-29 20:36:38 +08:00 |
|
mntng
|
692dc0803b
|
test: add test for SPI core using SD card
|
2017-07-28 19:10:44 +08:00 |
|
|
|
3778f93991
|
README: update credits/roles
|
2017-07-25 13:34:00 +08:00 |
|
|
|
3ae1c4f7f7
|
manual: add note about updating conda (#785)
|
2017-07-25 13:05:43 +08:00 |
|
|
|
df4f38a1e4
|
kc705: add pullup on SD card MISO
|
2017-07-24 22:26:16 +08:00 |
|
|
|
7eed4e7b6c
|
synchronize introduction.rst with README
|
2017-07-22 00:41:59 +08:00 |
|
dhslichter
|
61b0ad1982
|
Update README links
|
2017-07-22 00:11:16 +08:00 |
|
|
|
189020344c
|
spi: fix typo in doc
|
2017-07-20 22:18:21 +08:00 |
|
|
|
d0b21a8e85
|
manual: add short description of drivers, with replace support information. Closes #777
|
2017-07-20 12:01:29 +08:00 |
|
|
|
471605ec1e
|
pdq: move to https://github.com/m-labs/pdq
|
2017-07-19 17:35:28 +02:00 |
|
|
|
5c66b63768
|
setup.py etc: update license
|
2017-07-18 11:31:43 +02:00 |
|
|
|
377c776ec8
|
examples/dma_blink: replay → playback
|
2017-07-18 14:01:08 +08:00 |
|
|
|
9898681a38
|
aqctl_corelog: only set logging.DEBUG after the server is set up
Otherwise asyncio pollutes the log.
|
2017-07-18 14:00:06 +08:00 |
|
whitequark
|
dd87508a7f
|
Implement forwarding of logs from core device to master.
Fixes #691.
|
2017-07-18 05:31:59 +00:00 |
|
whitequark
|
819440f839
|
runtime: split log timestamp into secs.micros.
|
2017-07-18 05:31:59 +00:00 |
|
whitequark
|
9e38132c0a
|
artiq_devtool: don't drop data in unpredictable ways (sigh).
|
2017-07-18 05:31:59 +00:00 |
|
|
|
a201a9abd9
|
drtio: multilink transceiver interface
|
2017-07-18 13:27:33 +08:00 |
|
